Webcast: Through-Silicon Vias: Ready for Prime Time?

Originally broadcast March 25, 2008

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Through-silicon via (TSV) processes are already in volume manufacturing for CMOS image sensors, but it's not yet clear if the costs will be manageable for high-volume memory and logic 3-D chip stacking. A panel of experts will discuss the various etch, deposition and plating processes required for fabricating TSVs, focusing on unsolved manufacturability challenges. The role of wafer thinning and carriers, as well as reliability, design and test issues, will also be covered.

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Moderator:

Laura Peters Editor-in-Chief Semiconductor International

Panelists:

Philip Garrou IEEE Fellow Microelectronic Consultants of North Carolina

Jan Vardaman President TechSearch International

Fred Roozeboom Research Fellow NXP Semiconductors

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