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Dear Subscriber,
Readers spent time in the late summer months (July-September) with stories covering advances in lithography for both chips and HDD patterned media, packaging, photovoltaics, and a range of fab-related moves in geographies as far away as Russia. As might be expected, some of the biggest news came in the memory space, where Hynix closed older 200 mm fabs in the United States and Korea, and opened a 300 mm megafab. And readers were piqued to find out what a beetle's carapace has to do with optical computing. Please check out these Q3 top hits below, and keep up with all the latest news:
www.semiconductor.net
David Lammers, News Editor
david.lammers@reedbusiness.com
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| Oct. 21 Webcast: Metrology Gears for the Nanotech Age |
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The resolution, accuracy and capability of many metrology technologies are reaching their limits, and may not meet all the needs of nanotech manufacturing processes. In this webcast, possible metrology technology options will be discussed by experts in the field.
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| This Week's Top Stories... |
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Most Viewed Articles for the Week of September 29, 2008
This week readers paid close attention to 3-D packaging related news, including stories about a consortium led by Georgia Tech, a profile of Ziptronix, and DuPont's TSV-related expansion. Readers also clicked on stories about TSMC's controversial views about high-k for its 28 nm technology node, and a DiskCon session about nanoimprint lithography (NIL) for HDD patterned media. More
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Flip-Chip Changes on the Horizon
Sally Cole Johnson, Contributing Editor -- Semiconductor International, 7/2/2008
Flip-chips haven't changed much since being invented by IBM in the early '60s, but some interesting trends are emerging and several potential changes are on the horizon. More
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Thin-Film Photovoltaics Capture More of the Spectrum
Aaron Hand, Executive Editor, Electronic Media -- Semiconductor International, 7/1/2008
Although thin-film silicon solar cells do not have conversion efficiencies as high as most competing technologies, they offer compelling capabilities in terms of cost per kilowatt hour of energy. Thin-film technology, along with semiconductor and flat panel know-how, will help the solar industry reach the coveted grid parity. More
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Perspectives From the Leading Edge: 3-D Discussions in the Valley... Continued
Philip Garrou, Editorial Advisor -- Semiconductor International, 11/4/2007
Although this blog entry was posted almost a year ago, readers are still hungry for Garrou's updates and insights from RTI's 3D Architecture for Semiconductor Integration and Packaging meeting. More
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| Check Out SI’s Technology Library |
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Discover 100s of pages of technical content from key suppliers in the industry.
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Podcast: Update on the State of the Semiconductor Industry
Alexander E. Braun, Senior Editor -- Semiconductor International, 8/23/2007
The current state of the economy could be one explanation for the continued popularity of this audio interview with Carl Johnson, director of research at Infrastructure, who explains how macroeconomic drivers and dislocations in the U.S. economy are affecting the semiconductor industry. Although the interview was done more than a year ago, Johnson's insights are very relevant to state of the industry still today. More
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Obducat Rolls Sindre for Patterned Media
David Lammers, News Editor -- Semiconductor International, 7/7/2008
A new competition is emerging in the nanoimprint lithography (NIL) space between Obducat AB (Malmö, Sweden) and Molecular Imprints Inc. (MII, Austin, Texas). The two companies are competing to supply nanoimprint systems to the hard disk drive (HDD) media vendors. More
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Hynix to Close Eugene Fab; Other 200 mm Fabs May Shut
Staff -- Semiconductor International, 7/24/2008
Hynix Semiconductor Inc. announced it will close its 200 mm Eugene, Ore., fab, and is likely to shutter other 200 mm fabs in Asia. Hynix is considering its options for other 200 mm fabs, such as selling the equipment. More
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| Evolving CMP for Scaling Webcast |
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In this on-demand webcast, panelists discuss the demands for low-damage processes and excellent uniformity as well as new ways to address those challenges, particularly in copper metallization and barrier steps for interconnects. Panelists include: Mark Buehler of Intel Corp., Jan Vaes of IMEC, Reinhold Dauskardt of Stanford University, and Rajiv Singh of the University of Florida.
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Sponsored by: Levitronix and Jordan Valley
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IBM Takes Gloves Off for 32 nm Low-Power Competition With TSMC
David Lammers, News Editor -- Semiconductor International, 6/26/2008
IBM engineers returned home from the 2008 Symposium on VLSI Technology to argue that its adoption of a gate-first high-k/metal gate implementation at the 32 nm generation will put IBM and its partners ahead of Taiwan Semiconductor Manufacturing Co. Ltd. More
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What's Your Solar Story?
Aaron Hand, Executive Editor, Electronic Media -- Semiconductor International, 7/17/2008
Officially, SEMICON West had more than 250 exhibitors with offerings for both the photovoltaics and the semiconductor markets. But it seems that nearly every exhibitor had some sort of solar story to tell. More
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Brazilian 'Photonic Beetle' Points Way to Ultrafast Computing
Alexander E. Braun, Senior Editor -- Semiconductor International, 9/8/2008
Scientists have discovered that their research to build photonic crystals was redundant -- Mother Nature had already produced them with the ideal diamond-like structure, to decorate a beetle's carapace. More
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Sitronics Plans 300 mm Fab at Zelenograd
David Lammers, News Editor -- Semiconductor International, 8/27/2008
Sitronics Inc. (Moscow) will receive more than a billion dollars from a Russian governmental investment fund to build a 300 mm wafer fab at Zelenograd, near Moscow, according to a government ruling signed by Prime Minister Vladimir Putin. More
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Double Patterning Battles Cost, Complexity
Aaron Hand, Executive Editor, Electronic Media -- Semiconductor International, 7/17/2008
This year's Sokudo Lithography Breakfast Forum focused on the challenges of double patterning. To be sure, double patterning is not without its challenges, but it nonetheless is positioned as the most promising technology for 32 nm patterning, and likely 22 nm as well. More
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Chrome Going the Way of the Dodo Bird?
David Lammers, News Editor -- Semiconductor International, 7/29/2008
Chrome will be replaced by molybdenum silicide (MoSi) on masks starting at the 32 nm logic generation, said Franklin Kalk, CTO at Toppan Photomasks Inc. MoSi produces better sidewall patterns and is easier to etch. Asked if chrome may become obsolete, Kalk said, "Chrome probably is on its last legs." More
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Memory Moves to Megafabs for NAND
David Lammers, News Editor -- Semiconductor International, 7/17/2008
At SEMICON West, companies were discussing wafer processing tools, automation equipment and other pieces of the chip manufacturing infrastructure. The target: big memory megafabs. More
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Scanning Probe Microscope Works Out Solar Cell Profiles
Alexander E. Braun, Senior Editor -- Semiconductor International, 7/31/2008
Scanning probe microscope techniques can be used to study nanostructured organic photovoltaic cells, giving insights into film behavior and processing needs. Knowing about the chemistry of different film materials being considered for solar cells is not enough. Data about their nanostructures is vital to obtain the maximum efficiency when they are brought together in the finished cell. More
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Self-Aligned Double Patterning Coming
David Lammers, News Editor -- Semiconductor International, 7/17/2008
Applied Materials Inc. (Santa Clara, Calif.) announced several new tools at SEMICON West, and said that its self-aligned double patterning technology is gaining acceptance at key NAND flash manufacturers. More
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Molding Techniques Support Thin Gold Wires, Low-k Materials
Kenji Tsuda, Asia Contributing Editor -- Semiconductor International, 7/21/2008
New low-pressure molding technologies developed by two Japan-based molding machine manufacturers support thinner IC packages created with package-on-package (PoP), wafer-level packaging (WLP), and transparent resin packaging. The thin packages for new cell phone designs are a market driver. More
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Roadmap Signals Showstoppers
Laura Peters, Editor-in-Chief -- Semiconductor International, 7/17/2008
The overall theme of the 2008 update to the International Technology Roadmap for Semiconductors (ITRS) is a slight slowdown of gate-length scaling for high-performance and low-standby power devices, but the low-power device target dates will not change. More
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NEC Electronics Joins Fishkill Alliance
David Lammers, News Editor -- Semiconductor International, 9/11/2008
NEC Electronics has joined the IBM-led Fishkill Alliance, with a goal of implementing NEC's automotive microcontrollers and other products on the high-k/metal gate process at 32 nm design rules. More
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Suniva Produces Screen Printed Solar Cells With >20% Efficiencies
Business Wire, 9/16/2008
Suniva Inc.'s R&D team has developed several silicon solar cells in its lab with >20% conversion efficiencies using a patented combination of simple cell designs and screen printing technologies. These high efficiency milestones have been verified by the National Renewable Energy Laboratory (NREL). More
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Applied Breaks Ground on Singapore Center
Staff -- Semiconductor International, 7/8/2008
Applied Materials Inc. broke ground for a major manufacturing and operations facility in Singapore. The center will support customers in the Asian chip industry, as well as the rapidly growing solar markets in India and China. It is expected to open in late 2009. More
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