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TOP STORY... June 19, 2008

Intel Scales Floating
Body Cell Memory

Intel researchers presented a planar floating body cell (FBC) memory at the Symposium on VLSI Technology, using a thin silicon on insulator (SOI) technology. The FBC cell could be introduced at the 16 nm technology generation or beyond, sharply increasing the density of cache memory compared with conventional six-transistor (6T) SRAM technology, said Mike Mayberry, director of components research. "A single transistor memory would be so much better [than a 6T memory] if we can make it work," Mayberry said.
Read more >>


MORE NEWS...

Samsung, Siltronics Singapore Wafer Plant Starts Up

Toshiba Boosts Gate Density in 45 nm CMOS

SanDisk, Toshiba Team on 3-D Memory

Japan April Chipmaking Gear Orders Decline for 13th Month

China's Suntech to Cut Prices as Silicon Supply Improves

MORE >>

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