The latest news and information on semiconductor inspection, measurement and test, including metrology, microscopy, spectroscopy, spectrometry, CD measurement, defect detection/inspection, overlay and wafer inspection.
Memory Test Platform Handles Multiple Device Types Sally Cole Johnson, Contributing Editor - 11/25/2008
Verigy’s newest memory test family handles flash, DRAM and multichip packages (MCPs) — at the price of a flash tester. More
Applied Announces TSV Etcher, In-Fab Mask Inspection Capability David Lammers, News Editor - 12/01/2008
Applied Materials Inc. announced its Silvia deep silicon etcher for creation of the smooth sidewalls required for 3-D interconnects. Also, the company said it is offering a new version of its Aera2 mask inspection tool for use within a fab’s lithography cell, rather than at an external mask shop. The Aera2 for Lithography system is needed for double patterning, where mask critical dimensions must be closely watched, the compay said.
More
Measuring Material, Dopant Loss From Post-Implant Wafer Cleans Nikki Edleman, IBM Microelectronics, Hopewell Junction, N.Y.; Yong-Siang Tan, Chartered Semiconductor Mfg. Ltd., Singapore; Tom Tillery, Stephen Savas, Andreas Kadavanich and Allan Wiesnoski, Mattson Technology, Fremont, Calif. - 11/01/2008
Maintaining the integrity of ultrashallow junctions (USJs) after exposure to an increasingnumber of high-dose implant resist cleaning steps is critical for logic device manufacturing at the 45 nm node and beyond. Use of SiGe in the PMOS regions adds an additional material challenge. A new short loop method provides accurate relative measurements of amorphized silicon or SiGe loss caused by different types of strip/clean processes.
More
ISMI Outlines 450 mm Wafer, NGF Roadmaps David Lammers, News Editor - 10/27/2008
ISMI managers described progress at the 450 mm wafer Interoperability Test Bed, and described the Phase 2 roadmap at last week’s ISMI Symposium on Manufacturing Effectiveness. Also, the Next Generation Factory program at ISMI is continuing work on cycle time improvements for existing and greenfield 300 mm wafer fabs, including support for 12-wafer lots.
More
Photomask Printability, Standards and Cleaning Remain Concerns Alexander E. Braun, Senior Editor - 10/10/2008
At the 28th Photomask Technology conference in Monterey, Calif., technologists discussed ways to ensure the printability of patterns at the 22 nm node, and how to avoid damage to fragile features during cleaning. Ronald Dixson of NIST gave an update on NIST’s program in photomask dimensional metrology, another concern at the 22 nm generation.
More
In-House Manufacturing Remains a Core Competency at Advantest Sally Cole Johnson, Contributing Editor - 10/09/2008
While most of the automated test equipment (ATE) market has shifted to outsourced manufacturing, Advantest steadfastly relies on its own in-house manufacturing, assembly and qualification in Japan’s Gunma Prefecture.
More
SUSS MicroTec Removes Schneidewind as CEO Staff - 10/03/2008
The supervisory board of German equipment vendor SUSS MicroTec removed Stefan Schneidewind as CEO, and immediately placed Christian Schubert on the management board. The board cited “differing views regarding the future strategy of the company.”
More
Ricmar Group Buys Majority Stake in NanoPhotonics Staff - 10/01/2008
The Ricmar Group (Kramsach, Austria) said it has purchased a majority of NanoPhotonics AG (Mainz, Germany). Ricmar CEO Gerhard Zeindl said the plan is to integrate the NanoPhotonics defect inspection metrology tools into Ricmar’s wafer handling platform.
More
The Measure of All Things Alexander E. Braun, Senior Editor, Semiconductor International August 26, 2008 He Saw It All First
A few days ago, while emptying an old filing cabinet my wife came across a thick ... More
Plug in and get the latest SI news, trends and industry updates delivered directly to your inbox!
Technical Articles
Measuring Material, Dopant Loss From Post-Implant Wafer Cleans Nikki Edleman, IBM Microelectronics, Hopewell Junction, N.Y.; Yong-Siang Tan, Chartered Semiconductor Mfg. Ltd., Singapore; Tom Tillery, Stephen Savas, Andreas Kadavanich and Allan Wiesnoski, Mattson Technology, Fremont, Calif., 11/01/2008
Maintaining the integrity of ultrashallow junctions (USJs) after exposure to an increasingnumber of high-dose implant resist cleaning steps is critical for logic device manufacturing at the 45 nm node and beyond. Use of SiGe in the PMOS regions adds an additional material challenge. A new short loop method provides accurate relative measurements of amorphized silicon or SiGe loss caused by different types of strip/clean processes....
Inline Monitoring Detects CMOS Image Sensor Colorization Problems Jean-Charles Mattlin, STMicroelectronics, Rousset, France; Andreas Draeger, Vistec Semiconductor Systems, Weilburg, Germany, 10/01/2008
An optical non-destructive inspection method has been developed to detect colorization effects on CMOS image sensors. It can inspect 100% of the wafer surface, and is highly repeatable and reliable....
Concentration Sensors Curb Rising CoO Ron Chiarello, Jetalon Solutions Inc., Pleasant Hill, Calif., www.jetalon.com, Noritsugu Ishida, Swagelok Co., Solon, Ohio, 09/01/2008 In situ, real-time concentration monitoring will be vital to the industry's move to 65 nm CDs and below to address the need for increased yield and reduced waste....
View All Stories
More Videos >>
Measuring Material, Dopant Loss From Post-Implant Wafer Cleans
