Semiconductor International : Packaging Report
August 20, 2008
IN THIS EDITION
NEWS
 
» STMicro to Merge Ericsson Mobile Platforms Into JV
» Cadence Withdraws Proposal to Acquire Mentor Graphics
» Dow Corning Introduces Thermal Interface Material
» Ultratech Management Sees Bright Outlook
» Tessera Receives Patent Office Action in '627 Patent
» Sematech to Host 3-D Manufacturing Workshops
» South Korean Engineers Develop 3-D Manufacturing Process
» Shin-Etsu Polymer Develops Lightweight Resin Frame for Thin Wafers
» Nextreme Raises $13M for High-Volume Manufacturing
EDITOR'S PICKS
 
» Infineon, STATS ChipPAC, STMicro to Develop WLP Standard
» Perspectives From the Leading Edge: 3-D Integration Stays Hot at SEMICON West
PRODUCTS
 
» PoP Technology
» Lead-Free Solder Paste
UPCOMING EVENTS
 
Dear Subscriber,

The recent alliance between STMicroelectronics, Infineon and STATS ChipPAC to develop next-gen embedded wafer-level ball grid array (eWLB) technology left some in the industry questioning whether Freescale's redistributed chip packaging (RCP) technology, which is a similar family of technology, would be involved. Han Byung Joon, executive vice president and CTO of STATS ChipPAC, explained that the alliance is focused on developing more of a platform than intellectual property (IP) with eWLB, into which other technologies, such as RCP, can be easily adopted. For more details about the deal, see the alliance news item under Editor's Picks. Remember to look for more advanced packaging news and events on our Semiconductor Packaging Technology Channel:

www.semiconductor.net/packaging

Sally Cole Johnson, Contributing Editor
scolejohnson@mac.com

Advertisement
Thru-Silicon-Via (TSV) Foundry Services
ALLVIA, Inc. provides Thru-Silicon Via foundry services to MEMS and Semiconductor Industries meeting the demands of advanced vertical interconnects and System-in-Package (SiP) solutions. Through Silicon Vias provide the shortest electrical path between two sides of silicon die, allow miniaturization through 3D stacking, and support wafer level packaging (WLP) for RF and MEMS devices. With a full line of in-house processing equipment, ALLVIA offers services for prototyping as well as volume production runs.
Click here.



NEWS

STMicro to Merge Ericsson Mobile Platforms Into JV
PR Newswire, 8/20/2008

STMicroelectronics and Ericsson announced an agreement to merge Ericsson Mobile Platforms and ST-NXP Wireless into a joint venture. The 50/50 joint venture will have the industry's strongest product offering in semiconductors and platforms for mobile applications, and will be an important supplier to Nokia, Samsung, Sony Ericsson, LG and Sharp. More

Cadence Withdraws Proposal to Acquire Mentor Graphics
Business Wire, 8/15/2008

Cadence Design Systems Inc. announced that it has withdrawn its proposal to acquire all of the outstanding shares of Mentor Graphics Corp. More

Dow Corning Introduces Thermal Interface Material
Staff — Semiconductor International, 8/20/2008

Dow Corning Corp. said a thermally conductive compound, developed for use in Intel's latest mobile processor, is now commercially available. The compound, applied between a chip and its heat sink to carry away heat, can also be used for automotive power devices, LEDs, FPDs and other heat-sensitive systems. More

Ultratech Management Sees Bright Outlook
James Detar — Investor's Business Daily, 8/14/2008

Sales growth at Ultratech is running ahead of a lot of its larger peers after it lost money from 2005 to 2007. More

Tessera Receives Patent Office Action in '627 Patent
Business Wire, 8/13/2008

Tessera Technologies Inc. announced that the U.S. Patent and Trademark Office, on August 10, 2008, issued a second office action in the ongoing ex parte reexamination of Tessera's U.S. Patent No. 6,133,627 (the '627 patent). The patent relates to semiconductor packaging technologies used in a variety of applications. More

Sematech to Host 3-D Manufacturing Workshops
Business Wire, 8/18/2008

Sematech will host global experts representing a broad spectrum of the semiconductor industry at a workshop designed to explore manufacturing and reliability challenges for 3-D IC products. The forum, entitled "Manufacturing and Reliability Challenges for 3D ICs using TSVs," will be held in conjunction with the Advanced Metallization Conference, Sept. 25-26, at the Del Mar Fairgrounds in San Diego. More

South Korean Engineers Develop 3-D Manufacturing Process
Asia Pulse, 8/11/2008

South Korean engineers claim that they have developed the world's first 3-D IC technology, an advance that should lead to greatly expanded computer chip capabilities, the government said. More

Shin-Etsu Polymer Develops Lightweight Resin Frame for Thin Wafers
Kenji Tsuda, Asia Contributing Editor — Semiconductor International, 8/6/2008

As thinned wafers play a more prominent role in an industry moving toward 3-D chips, Shin-Etsu Polymer Co. Ltd. has developed a resin frame for handling wafers of <100 µm. The resin frame reduces weight and contamination compared with conventional stainless steel frames that are used to support the very thin wafers used for 3-D ICs, system-in-a-package (SiP) and thin packages <1 mm thick. More

Nextreme Raises $13M for High-Volume Manufacturing
Business Wire, 8/6/2008

Nextreme Thermal Solutions has secured $13M in Series B financing. The round was led by Chart Venture Partners and included previous investors Redshift Venture Partners, Harris & Harris Group Inc., In-Q-Tel and RTI International, as well as Japan-based ITOCHU Corp. and ITOCHU Technology Ventures Inc. More

Advertisement
The latest on 3-D INTEGRATION & PACKAGING
The fifth international conference — 3-D Architectures For Semiconductor Integration And Packaging — will be held November 17-19 at the Hyatt Regency San Francisco Airport Hotel. More than thirty companies will be presenting and participating in panel discussions. Learn the latest technology and market developments in 3-D integration and packaging. Visit the link below to learn more—and register today!
Register now!

EDITOR'S PICKS

Infineon, STATS ChipPAC, STMicro to Develop WLP Standard
Ann Steffora Mutschler, Senior Editor — Electronic News, 8/7/2008

The foundation of the technology that the companies hope will become a standard is Infineon's embedded wafer-level ball grid array (eWLB) technology, which uses a combination of traditional front- and back-end semiconductor manufacturing techniques with parallel processing of all of the chips on the wafer, meant to lead to reduced manufacturing costs. More

Perspectives From the Leading Edge: 3-D Integration Stays Hot at SEMICON West
Phil Garrou, Contributing Editor — Semiconductor International, 8/13/2008

There was significant buzz about 3-D integration at SEMICON West. Bernie Meyerson, vice president of the Systems & Technology Group at IBM, in his keynote presentation titled, "Semiconductor Technology: A Convergence of Technology and Business Models," indicated that silicon technology and its business model are both in the process of making dramatic changes because of, amongst other things, cost estimates for developing the 22 nm node ranging from $2B to $2.5B. Blog

Advertisement
RSS Feeds – Bring The Headlines To You
Subscribe to SI's RSS Feeds to automatically receive the latest news headlines, technical features, blog postings, etc. as soon as they are posted. The power of RSS lies in its ability to bring all of the news and content that interests you into one place.
Subscribe now!

PRODUCTS

PoP Technology

Fan-in package-on-package (FiPoP) technology allows multiple logic, analog and memory die to be integrated in the bottom PoP and accomodates larger die sizes in a reduced footprint. It has an exposed array of land pads on the top center surface, which eliminates the requirement of the top and bottom packages to be the same size.
STATS ChipPAC Ltd., Singapore
More

Lead-Free Solder Paste

Indium9.32 is a halogen-free, no-clean solder paste for high-volume, lead-free die-attach applications. It has a low void of <5% total and ultralow residue.
Indium Corp., Clinton, N.Y.
More

Advertisement
Free Subscription to Semiconductor International
Semiconductor International is the leading technical publication covering the global semiconductor industry. It provides focus on the latest research projects, new technology developments and much more!
Subscribe Now!

UPCOMING EVENTS

Sept. 7-10, 2008: KGD Packaging & Test Workshop

Sept. 15-17, 2008: Advanced Thermal Management and Packaging Material

Oct. 13-16, 2008: International Wafer-Level Packaging Conference

Copyright 2008 Reed Business Information, a division of Reed Elsevier Inc. All Rights Reserved.
Advertisement

SUBSCRIBE
To activate a new FREE
e-mail subscription, visit
Click Here

CHANGE YOUR PROFILE
To change delivery
options, e-mail address or
register for other
newsletters, Click Here.

QUESTIONS?
If you have any questions
or need further assistance,
please contact our Online
Support Team
.

Online Support Team
Reed Business Information
2000 Clearwater Drive
Oak Brook, IL 60523
Fax: 630-288-8394

You are receiving this
e-mail because you have
either requested a
newsletter or a magazine
from Reed Business
Information.

Privacy Policy

** If you found this FREE
newsletter valuable, please
email it to a colleague!

To request your FREE
magazine subscription to
Semiconductor International, Click Here
.
Advertisements