Semiconductor International : Wafer Processing Report
June 27, 2008
IN THIS EDITION
NEWS
 
» IBM Takes Gloves Off for 32 nm Low-Power Competition With TSMC
» Sematech Reports Progress at VLSI Meeting
» Intel Scales Floating Body Cell Memory
» Aviza Develops Etch/PVD/CVD Tool for 3-D IC R&D
» ASMI Rejects Applied's Offer for ALD, PECVD Businesses
» VLSI Research Ranks Top Equipment Vendors
» Silicon Wafer Revenue Up 22.5% in 2007
» SMIC Says 45 nm Process Ready Next Year
» Intel May Be Pushing Applied to Buy ASMI
EDITOR'S PICKS
 
» SEMICON West 2008 Executive Outlook
» Yield Goals for 22 nm
» Yield, Surface Prep for Nano Devices
PRODUCTS
 
» Dual-Mode Dry Etch Tool
» CMP Pad Enhancement
» 3-D Cost Model
UPCOMING EVENTS
 
Dear Subscriber,

This month we have some important news out of the VLSI Symposium, including Sematech's progress on high-mobility channels. SMIC is getting ready to produce 45 nm devices, and we have an exclusive report on that from News Editor Dave Lammers. Remember you can keep up to date with these items and more at our Wafer Processing Technology Channel:

www.semiconductor.net/wafer

Laura Peters, Editor-in-Chief
lpeters@reedbusiness.com

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NEWS

IBM Takes Gloves Off for 32 nm Low-Power Competition With TSMC
David Lammers, News Editor — Semiconductor International, 6/26/2008

IBM engineers described the Fishkill alliance's low-power 32 nm process technology, which includes a high-k/metal gate stack, at the 2008 Symposium on VLSI Technology. IBM Vice President Gary Patton said the insertion of high-k will give the partners several advantages over foundry rival TSMC, which plans to stick with an oxide/poly gate stack. "Poly oxynitrides are going to be quite a bit more expensive than using high-k/metal gate at 32 nm," Patton said. More

Sematech Reports Progress at VLSI Meeting
David Lammers, News Editor — Semiconductor International, 6/23/2008

At the 2008 Symposium on VLSI Technology, Sematech researchers described progress with gallium arsenide (GaAs) and silicon germanium channels. Though these materials have higher levels of mobility than silicon, the dielectrics present unique deposition and reliability challenges. Also, Sematech and University of Florida researchers presented work on the effect of strain on GaAs devices. More

Intel Scales Floating Body Cell Memory
David Lammers, News Editor — Semiconductor International, 6/19/2008

Intel researchers presented a planar floating body cell (FBC) memory at the Symposium on VLSI Technology using a thin silicon on insulator (SOI) technology. The FBC cell could be introduced at the 16 nm technology generation or beyond, sharply increasing the density of cache memory compared with conventional six-transistor SRAM technology, said Mike Mayberry, director of components research. More

Aviza Develops Etch/PVD/CVD Tool for 3-D IC R&D
Sally Cole Johnson, Contributing Editor — Semiconductor International, 6/17/2008

Aviza is offering a small-footprint cluster tool targeted for 3-D ICs using through-silicon vias (TSVs). More

ASMI Rejects Applied's Offer for ALD, PECVD Businesses
Ann Steffora Mutschler, Senior Editor — Electronic News, 6/16/2008

Following the recent unsolicited offer by capital equipment giant Applied Materials to ASM International (ASMI) for its atomic layer deposition (ALD) and plasma-enhanced chemical vapor deposition (PECVD) businesses with a value between $400M to $500M, ASMI announced that its management and supervisory boards have considered the offer, and have no interest to sell the ALD and/or PECVD activities, but is willing to have discussions on the matter. More

VLSI Research Ranks Top Equipment Vendors
Staff — Semiconductor International, 6/11/2008

Keithley Instruments, SEN Corp. and Varian Semiconductor came out on top in their respective categories in the annual customer satisfaction survey conducted by VLSI Research Inc. The market research firm announced the results of its annual survey of semiconductor makers regarding vendors of process diagnostics equipment and small and large suppliers of wafer processing equipment. More

Silicon Wafer Revenue Up 22.5% in 2007
Ann Steffora Mutschler, Senior Editor — Electronic News, 6/11/2008

In contrast to 300 mm wafer demand, the 200 mm segment showed clear signs of deceleration during and after 2Q07. Shipments fell to 5.4 million wpm in the fourth quarter, Gartner reported. More

SMIC Says 45 nm Process Ready Next Year
David Lammers, News Editor — Semiconductor International, 6/10/2008

SMIC plans to have its 45 nm process in volume production by the second half of 2009, starting with a low-power process aimed at mobile devices, cameras and personal navigation systems. SMIC is seeking customers among local Chinese companies, as well as with "top-tier fabless and IDM companies that have expressed interest in working with SMIC on 45 nm," said Chiou Feng Chen, vice president of marketing. More

Intel May Be Pushing Applied to Buy ASMI
David Lammers, News Editor — Semiconductor International, 6/9/2008

Gartner Inc. equipment analyst Dean Freeman said the bid by Applied Materials to buy the ALD and PECVD businesses at ASM International may relate to a desire by Intel Corp. to see ASMI's technology in Applied's hands. "Intel has a way of marrying small companies that have technology they want with larger suppliers," Freeman said, who speculated that Applied may be readying its own expanded ALD push. More

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EDITOR'S PICKS

SEMICON West 2008 Executive Outlook
Semiconductor International, 6/15/2008

In the front end, all eyes are on the extension of 193 nm lithography with immersion and double patterning, along with making high-k/metal gate processes more cost-effective. Meanwhile, real 3-D integration is occurring with package-on-package (PoP) and 3-D ICs using through-silicon vias (TSVs). Executives throughout the industry are emphasizing the importance of energy conservation, cost-effectiveness and high productivity — key measures going forward. More

Yield Goals for 22 nm
D. Patel et al., International Sematech Manufacturing Initiative (ISMI), Austin, Texas — Semiconductor International, 6/1/2008

The industry is on target to deliver necessary defect metrology and film metrology solutions, but new overlay target structures are needed for 22 nm monitoring. More

Yield, Surface Prep for Nano Devices
Ahmed Busnaina, NSF Nanoscale Science and Engineering Center for High-rate Nanomanufacturing — Semiconductor International, 6/1/2008

Nanoscale emerging research devices in the "beyond CMOS scaling" realm cover many applications and state variables. There have been many discussions of the characteristics, performance requirements, etc., of these devices, but the manufacture of these devices and the resulting yield has not been addressed. However, if these devices are expected to be in the development stage during the next 10 years, there is a need to address how they will be manufactured, including yield issues and what the future holds for surface preparation and cleaning approaches. More

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PRODUCTS

Dual-Mode Dry Etch Tool

PlasmalabµEtchEL is a flexible dry etch tool that offers switchable dual-mode PE/RIE capability. The dual-mode configuration enables processes to be run for isotropic polyimide removal, isotropic SiNx removal and anisotropic IMD/ILD etch in a single tool for small die or packaged devices through to 200 mm wafers.
Oxford Instruments Plasma Technology Ltd., Bristol, UK
More

CMP Pad Enhancement

A groove design for the IC1000 AT and VisionPad CMP pads achieves up to 35% reduction in slurry consumption for 200 and 300 mm tungsten polishing processes.
Rohm and Haas Electronic Materials, CMP Technologies, Phoenix
More

3-D Cost Model

The Cost Analysis Tool dedicated to 3-D IC manufacturing allows users to tune fab parameters, including the number of wafers processed per year, global process yield, operator cost per year, etc. It also provides precise descriptions on cleanroom class, maintenance cost, as well as many other options.
Yole Développement, Lyon, France
More

UPCOMING EVENTS

July 15-17, 2008: SEMICON West

July 15, 2008: Impact of CMOS Technology Scaling on ESD HCPh

July 17-18, 2008: Plasma Etch Tech 2008

Copyright 2008 Reed Business Information, a division of Reed Elsevier Inc. All Rights Reserved.
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