Semiconductor International : Wafer Processing Report
July 25, 2008
IN THIS EDITION
NEWS
 
» Funding for ISMI 450 mm Effort Doubling
» Memory Moves to Megafabs for NAND
» Roadmap Signals Showstoppers
» SMIC Lays Foundation for Shenzhen Fab
» Intermolecular Speeds R&D for Elpida's Next-Gen Memory
» Hynix to Close Eugene Fab; Other 200 mm Fabs May Shut
EDITOR'S PICKS
 
» 300mmPrime: Tackling Detractors of Fab Productivity
» Extending Fab Life: Measure, Monitor and Control
PRODUCTS
 
» Novellus Debuts Deposition Tools During West
» Ulvac Intros High-Throughput Asher
» Soitec Ready With Ultrathin SOI Wafers
UPCOMING EVENTS
 
Dear Subscriber,

We have lots of news out of SEMICON West from last week, including a significant, overriding trend to the megafab. No, we're not talking about 100,000 wafer starts per month but more like 200,000 300 mm wafer starts per month. These memory-based megafabs make the argument for 450 mm wafers look stronger all the time. People heading up the 450 mm effort at ISMI talked to Dave Lammers, our news editor, about how the attitude towards 450 mm is slowly changing. Meanwhile, Hynix and others are shutting down their less cost-effective 200 mm facilities. As always, you can always find our latest wafer processing updates at our Wafer Processing Technology Channel:

www.semiconductor.net/wafer

Laura Peters, Editor-in-Chief
lpeters@reedbusiness.com

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NEWS

Funding for ISMI 450 mm Effort Doubling
David Lammers, News Editor — Semiconductor International, 7/22/2008

The 450 mm wafer development effort is increasing funding for the Interoperability Test Bed (ITB) now underway at Sematech's Austin, Texas, facility amid continuing discussions about how the chipmakers might subsidize 450 mm equipment development, proponents said at SEMICON West in San Francisco last week. More

Memory Moves to Megafabs for NAND
David Lammers, News Editor — Semiconductor International, 7/17/2008

When Novellus Systems' (Milpitas, Calif.) CEO Rick Hill went to Korea not long ago to visit Hynix Semiconductor Inc. (Icheon, Korea), he bunny-suited up to go through the M11 fab and was astounded at the sheer size of the place, while also pleased to hear about the $8B budgeted for equipment. Over the next few years, several fabs with 150,000-200,000 wafer starts per month (wspm) will be constructed, with an eye to the potentially huge market for NAND flash used in solid-state disk drives (SSDs). More

Roadmap Signals Showstoppers
Laura Peters, Editor-in-Chief — Semiconductor International, 7/17/2008

The overall theme of the 2008 update to the International Technology Roadmap for Semiconductors (ITRS) is a slight slowdown of gate-length scaling for high-performance and low-standby-power devices, but the low-power device target dates will not change. At the ITRS presentations given last week, chairs of each of the individual technology working groups (TWGs) summarized pivotal changes in this year's roadmap. More

SMIC Lays Foundation for Shenzhen Fab
Yao Gang, Editor-in-Chief, SI China — Semiconductor International, 6/30/2008

Semiconductor Manufacturing International Corp. (SMIC) kicked off construction of the 200 mm fab it is building in the southern city of Shenzhen, with support from the Shenzhen city government. The line is expected to begin pilot production late next year, followed by construction of a 300 mm line. More

Intermolecular Speeds R&D for Elpida's Next-Gen Memory
Aaron Hand, Executive Editor, Electronic Media — Semiconductor International, 7/15/2008

Intermolecular Inc. (San Jose) announced a new collaborative development program (CDP) and licensing agreement with Elpida Memory Inc. (Tokyo) to enable rapid development of new materials and process technologies for its next-generation memory chips. The CDP will use Intermolecular's PVD and ALD workflows and applications. More

Hynix to Close Eugene Fab; Other 200 mm Fabs May Shut
Staff — Semiconductor International, 7/24/2008

Hynix Semiconductor Inc. announced it will close its 200 mm Eugene, Ore., fab, and is likely to shutter other 200 mm fabs in Asia. Hynix is considering its options for other 200 mm fabs, such as selling the equipment. More

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EDITOR'S PICKS

300mmPrime: Tackling Detractors of Fab Productivity
Denis Fandel and Robert Wright, International Sematech Manufacturing Initiative (ISMI), Austin, Texas — Semiconductor International, 7/1/2008

Though the goals of 50% shorter manufacturing cycle time and 30% lower processed wafer cost were not shown to be achievable simultaneously, modeling and simulation demonstrated possible cycle time and cost savings based on shorter first wafer delay, higher equipment availability and conversions to single wafer processing. More

Extending Fab Life: Measure, Monitor and Control
Dick Deininger and Rebecca Taylor, Taylor-Deininger Partners Inc., Austin, Texas — Semiconductor International, 7/1/2008

Two-thirds of semiconductor products made today are manufactured in older fabs (150, 200 and 300 mm); they are focused on making products that do not demand leading-edge technology to be profitable. These fabs face significant, increasing pressure to cut costs, conserve resources and continuously increase productivity to be competitive in world markets. In legacy fabs, dynamic, remote monitoring of gauges can lead to significant improvements in productivity and cost savings. More

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PRODUCTS

Novellus Debuts Deposition Tools During West
David Lammers, News Editor — Semiconductor International, 7/15/2008

Novellus Systems (San Jose) unveiled two tools at the Yerba Buena Center of Arts during SEMICON West. The Vector Extreme AHM is aimed at the growing use of ashable hard masks (AHMs) by the large memory chip vendors. A high-density plasma CVD tool, Speed Max, targets the gap-fill sector.
More

Ulvac Intros High-Throughput Asher
Laura Peters, Editor-in-Chief — Semiconductor International, 7/16/2008

At SEMICON West, Ulvac introduced the Enviro Optima resist strip and residue cleaning system, which delivers 400 wph, with a modest 300 mm footprint and at the cost of $1.3M.
More

Soitec Ready With Ultrathin SOI Wafers
David Lammers, News Editor — Semiconductor International, 7/16/2008

In a materials advance that could enable multi-gate logic devices and floating body single transistor memories, Soitec said it has qualified a line of SOI wafers that feature ultrathin top silicon and buried oxide layers.
More

UPCOMING EVENTS

Sept. 9-11, 2008: SEMICON Taiwan

Sept. 21-24, 2008: Ultra-Clean Processing of Semiconductor Surfaces

Oct. 7-9, 2008: SEMICON Europa

Copyright 2008 Reed Business Information, a division of Reed Elsevier Inc. All Rights Reserved.
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