Semiconductor International NewsBreak
Semiconductor International NewsBreak
TOP STORY... July 1, 2008

TSV Apps Need TSV Tools
While key applications in CMOS image sensors and stacked memories continue to drive 3-D technology, a significant need from the tool side is still unmet: production-worthy throughputs. The technologies used to create and fill through-silicon vias (TSVs) — whether it be etching, plating or chemical mechanical planarization (CMP) — need to perform at much higher rates to make 3-D technology cost-effective, according to Kyle Kirby, engineering supervisor at Micron Technology (Boise, Idaho). He spoke at Semitool's latest PEAKS Symposium on Electrochemical Processes for Microelectronics, held last week in Kalispell, Mont.
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Rohm and Haas Announces Enhanced VaporStation System

Carsem's Copper Wire Bonding Program in Full Production

Veeco Launches Research Grant Program

MORE >>

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FEATURED BLOG...

Perspectives From The Leading Edge: More 3-D Integration at ECTC
Phil Garrou provides a series of short 3-D interconnect updates from the Electronic Component Technology Conference (ECTC). Steven Wright of IBM reported on tungsten via testing. Wright tested the reliability of tungsten-filled vias under high-current stress. The annular vias had a diameter of 77 µm. The results indicated that the limitations on power distribution with this technology are associated with the solder bumps used as interconnect, not the tungsten-filled vias.

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