Semiconductor International : Clean Processing Report
June 18, 2008
IN THIS EDITION
NEWS
 
» Sematech Reports on Scaling Advances at VLSI Symposium
» Akrion Books Multiple Batch Immersion Systems
» FSI's Zeta System Reduces Surface Damage
» Akrion Completes Sale of Verteq Component Line
» Megasonics Generator Introduced for Cleaning Fine Geometries
» WSC Pledges Cooperation on Environmental Concerns
» Akrion, CEA-Liten to Collaborate on Solar Cell Development
EDITOR'S PICKS
 
» SEMICON West 2008 Executive Outlook
» Yield, Surface Prep for Nano Devices
PRODUCTS
 
» Wafer Edge Cleaning System
» Plasma Cleaning, Contamination Removal System
» Photoresist Strip System
UPCOMING EVENTS
 
Dear Subscriber,

I'm in the middle of working on our August cover story on wafer cleaning and surface prep, and I'd love to hear from you about what you think the most pressing technical issues are in this area. Are there any concerns that you'd particularly like to see addressed? Anything that you don't feel has been adequately covered in the past? With the VLSI Symposium going on this week in Hawaii, presentations will discuss the latest and greatest circuit advances. As an example, read below Sematech's account of its new use of materials and structures. Any of that scare you? Remember that you can always keep up to date with the latest clean processing developments at our Clean Processing Technology Channel:

www.semiconductor.net/clean

Aaron Hand, Executive Editor, Electronic Media
ahand@reedbusiness.com

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NEWS

Sematech Reports on Scaling Advances at VLSI Symposium
Business Wire, 6/17/2008

Sematech experts will present cutting-edge research results on advanced new materials and device structures for continued scaling of semiconductor technologies at the 2008 Symposia on VLSI Technology and Circuits. Advances in high-k/metal gates, high-mobility channels, finFETs and more will undoubtedly bring new challenges in surface preparation. More

Akrion Books Multiple Batch Immersion Systems
PR Newswire, 6/18/2008

Akrion Inc. announced today the receipt of several orders for automated wet process equipment. The orders, all received this month, totaled more than $6M and will ship to customers in the second half of this year. More

FSI's Zeta System Reduces Surface Damage
Business Wire, 6/17/2008

FSI International Inc. announced that a paper jointly presented by Hynix Semiconductor Inc., Varian Semiconductor Equipment Associates Inc., Nanometrics Inc. and FSI identifies the Zeta Spray Cleaning System with ViPR technology as a key step in the integration of ultrahigh-dose PLAD (plasma doping) ion implantation. The paper was presented at the 17th International Conference on Ion Implantation Technology held last week in Monterey, Calif. More

Akrion Completes Sale of Verteq Component Line
PR Newswire, 6/10/2008

Akrion Inc., a supplier of advanced surface preparation equipment, announced that it has sold the Spin Rinser Dryer and Batch Megasonic product lines of the former Verteq Inc. More

Megasonics Generator Introduced for Cleaning Fine Geometries
Business Wire, 6/10/2008

At SEMICON West, PCT Systems will introduce its Model 9400 Megasonic generator specifically designed for today's fine geometries and fragile wafer features. More

WSC Pledges Cooperation on Environmental Concerns
Medical Patent Week, 6/15/2008

The World Semiconductor Council concluded its 12th annual meeting in Taipei, Taiwan, with a wide-ranging set of recommendations for expanding global trade in semiconductors and electronic products, enhancing intellectual property (IP) protections and supporting strong environment, safety and health (ESH) practices. More

Akrion, CEA-Liten to Collaborate on Solar Cell Development
PR Newswire, 6/4/2008

Akrion Inc. and CEA-Liten have signed an agreement to collaborate until at least the end of 2009. Akrion's system will provide pre-deposition surface conditioning for heterojunction solar cells as part of the research program on Liten's silicon solar cells technology platform. More

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EDITOR'S PICKS

SEMICON West 2008 Executive Outlook
Staff — Semiconductor International, 6/15/2008

In the front end, all eyes are on the extension of 193 nm lithography with immersion and double patterning, along with making high-k/metal gate processes more cost-effective. Meanwhile, real 3-D integration is occurring with package-on-package (PoP) and 3-D ICs using through-silicon vias (TSVs). Of course, all of these developments bring new wafer cleaning and contamination challenges. In particular, check out comments from Entegris about contamination, Applied Materials about wafer and mask cleaning, and Novellus about resist strip. More

Yield, Surface Prep for Nano Devices
Ahmed Busnaina, William Lincoln Smith Professor and Director, The NSF Nanoscale Science and Engineering Center for High-Rate Nanomanufacturing and the NSF Center for Microcontamination Control — Semiconductor International, 6/1/2008

Nanoscale emerging research devices in the "beyond CMOS scaling" realm cover many applications and state variables. There have been many discussions of the characteristics, performance requirements, etc., of these devices, but the manufacture of these devices and resulting yield have not been addressed. However, if these devices are expected to be in the development stage during the next 10 years, there is a need to address how they will be manufactured, including yield issues and what the future holds for surface preparation and cleaning approaches. More

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PRODUCTS

Wafer Edge Cleaning System

Inflexion is a high-precision defect removal system that polishes and cleans the critical wafer edge region. The system polishes the entire wafer edge, removing all film stack residues and shallow surface defects in a single pass while minimizing the exclusion area to maximize the number of good die.
Applied Materials Inc., Santa Clara, Calif.
More

Plasma Cleaning, Contamination Removal System

PE-100 is a plasma cleaning and contamination removal system that accommodates up to 240 in. of process area capacity per run cycle. It operates by using a dry RF-induced ionized plasma process, which enables uniform removal of undesirable contaminants.
Plasma Etch Inc., Carson City, Nev.
More

Photoresist Strip System

Alpine was designed to meet the requirements of advanced low-temperature photoresist strip processes on BEOL and FEOL applications for 65 nm and below. It features an inductively coupled plasma source and bias capability that enables independent control of ion energy and ion density at low pressures to minimize damage to low-k materials.
Mattson Technology Inc., Fremont, Calif.
More

UPCOMING EVENTS

July 15-17, 2008: SEMICON West

Sept. 21-24, 2008: Ultra-Clean Processing of Semiconductor Surfaces

Copyright 2008 Reed Business Information, a division of Reed Elsevier Inc. All Rights Reserved.
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