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June 4, 2008 |
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IN THIS EDITION |
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NEWS |
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EDITOR'S PICKS |
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PRODUCTS |
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UPCOMING EVENTS |
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Dear Subscriber,
A new survey about silicon on insulator (SOI) technology, conducted by the Global Semiconductor Alliance (GSA) and the SOI Industry Consortium, has revealed that many companies are already using SOI or are interested in evaluating it for power savings at technology nodes starting with 90 nm. SOI technology (which typically involves the use of wafer bonding equipment) electrically insulates a fine layer of the monocrystalline silicon from the rest of the silicon wafer, creating new areas for innovation, delivering performance, power and area advantages that bulk CMOS technologies can't easily match, according to the SOI Industry Consortium. In RF and mixed-signal applications, SOI offers low noise and high-quality passives, which will likely be leveraged in the future to
expand SOI into the domain of system-on-a-chip (SoC) applications. If you're interested in more details, the survey results will be available on the GSA and SOI Industry Consortium websites by June 16, 2008. For more advanced packaging news and events, visit our Packaging Technology Channel:
www.semiconductor.net/packaging
Sally Cole Johnson, Contributing Editor
scolejohnson@mac.com |
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Survey Reflects Interest in SOI for Low Power
PR Newswire, 6/3/2008
The Global Semiconductor Alliance (GSA) and the SOI Industry Consortium jointly announced the completion of a global study focused on SOI. More than 100 semiconductor companies involved in the design of ICs responded to the survey about their needs and perceptions of SOI. 87% of respondents indicated that they are interested in evaluating or are already using SOI, particularly for power savings at mainstream technology nodes starting with 90 nm. The survey also confirms the need to educate the market on available solutions, methodology and training across the global ecosystem, points that are being addressed by the SOI Industry Consortium. More |
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KLA-Tencor Completes First Stage of ICOS Acquisition
Business Wire, 6/3/2008
KLA-Tencor Corp. announced that it has finalized its purchase of the shares of ICOS Vision Systems, a company that designs and manufactures inspection equipment for semiconductor packaging and interconnect applications. More |
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FormFactor Appoints CEO, Executive Chairman
Market Wire, 6/3/2008
FormFactor Inc.'s board of directors has appointed Mario Ruscev, currently president, as its next CEO. Ruscev will succeed Igor Khandros, FormFactor's founder, who will become executive chairman of the FormFactor board of directors. Khandros will succeed Jim Prestridge, its current chairman, who will remain on the FormFactor board of directors and become its lead independent director. The changes will become effective at the beginning of the company's fiscal third quarter of 2008. More |
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Researcher Wins IEEE Award for Work on 3-D Interconnects
States News Service, 5/27/2008
James Jian-Qiang Lu, associate professor at Rensselaer, received the 2008 IEEE CPMT Exceptional Technical Achievement Award as a leader in the field of 3-D packaging and manufacturing. Lu' research spans a wide spectrum of micro- and nano-electronics technology, from theory and design to materials, devices, processing and system integration. More |
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QuickLogic's ArcticLink Available in WLCSP
Business Wire, 5/28/2008
QuickLogic has made its ArcticLink Customer Specific Standard Product (CSSP) platform available in a tiny wafer-level chip-scale package (WLCSP). More |
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SUSS Automated Bond Cluster Selected for Korean MEMS Foundry
Business Wire, 5/29/2008
SUSS MicroTec announced that u-ITC has selected the advanced wafer bonding equipment for its MEMS foundry. More |
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ASE Test Scheme of Arrangement Becomes Effective
PR Newswire, 6/2/2008
Advanced Semiconductor Engineering Inc. announced that the "going private" acquisition by ASE Inc. of the outstanding ordinary shares of ASE Test became effective on May 30. More |
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Estimating Junction Temperature in Power MOSFETs
Satoru Sawahata, Vishay Siliconix — EDN, 5/30/2008
If you can determine the surface temperature of a MOSFET package with a bench probe, you can get a good idea of the device's junction temperature. More |
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Choosing the Right Thermal Interface Material
David Hirschi, Dow Corning Electronics and Advanced Technologies, Dow Corning Corp., Midland, Mich. — Semiconductor International, 6/1/2008
Specifying the right thermal interface material (TIM) requires an understanding of how interdependent elements of a TIM formulation work together and when specific considerations take priority. More |
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| Through-Silicon Vias: Ready for Prime Time? |
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In this on demand webcast, a panel of experts discuss
the various etch, deposition and plating processes
required for fabricating TSVs, focusing on unsolved
manufacturability challenges. Panelists include:
Philip Garrou of Microelectronic Consultants of NC,
Jan Vardaman of TechSearch International, and
Fred Roozeboom of NXP Semiconductors. View now!
Sponsored by: ECI Technology, Surface Technology Systems & ALLVIA, Inc.
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Automatic Multi-Chip Bonder
MCM12 is a fully automatic, multiple die, SMD and flip-chip bonding system with up to 300 mm wafer handling capability. It comes equipped with a fully programmable dispensing system and automatic pick up and ejector tool changing systems.
ASM Pacific Technology, Hong Kong
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Flip-Chip Bonder
The 8800 CHAMEO is a multi-flip-chip bonder for high-volume, high-throughput MCM/SiP assembly, based on the company's 8800 FC Quantum bonder. The system offers users fully automatic calibration, short conversion time, reject detection and a SECS/GEM data link.
Datacon Technology GmbH, Radfeld, Austria
More |
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Advertisement |
| June 17: Innovation at Risk - Intellectual Property Challenges
and Opportunities |
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A new white paper published by SEMI provides a detailed study
of various IP challenges facing the equipment and materials
industry and offers recommendations for improving the situation.
This webcast features an overview of the SEMI findings and
further discussion by a panel of industry executives. Register now!
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June 10-12, 2008: International Conference on Electronics Packaging
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June 23-27, 2008: Nanomechanics for NEMS
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June 24-28, 2008: PEAKS in Packaging Symposium
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July 15-17, 2008: SEMICON West
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