Semiconductor International NewsBreak
TOP STORY... April 28, 2008

TSMC Sketches 32 nm
Rollout Plan for 2009

Taiwan Semiconductor Manufacturing Co. Ltd. plans to begin 32 nm production in the third quarter of 2009, with foundry production of dual core 3G cell phone chipsets as one focus, said Jack Sun, TSMC's vice president of R&D. TSMC will use a high-k/metal gate process for high-frequency microprocessor production, he said, while sticking with a poly/oxynitrides gate stack for the general purpose and low-power platforms.
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Some Signs of Improvement for DRAM Market

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On Demand: Wafer Cleaning Solutions for 45 and 32 nm
Recorded as a live panel at Sematech's SPCC in Austin, Texas, this on demand webcast focuses on FEOL wafer cleaning and photoresist strip challenges and solutions for the 45 and 32 nm device generations. Panelists include: Jeffrey Butterbaugh, FSI International; Anthony Muscat, University of Arizona; D. Martin Knotter, NXP Semiconductors; Brian Kirkpatrick, Texas Instruments.
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Sponsored by: IDEX Health & Science Group

FEATURED ARTICLE...

Design for Manufacturability Gears Up for 32 nm
Design for manufacturing (DFM) has become part of the mainstream IC design flow, but many tough problems remain to be solved, according to an interview with Andrew Kahng, professor at the University of California at San Diego (UCSD). Kahng, who is also co-founder of start-up Blaze DFM, talks about what's in use today, what's needed for 32 nm, the role of restricted design rules, the importance of electrical DFM, and directions for future research.

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SEMATECH Litho Forum: Meeting Future Technologies Head On
Don't miss the industry's premier conference focused on identifying the readiness of leading lithography technologies—including EUVL, high-index 193i, double patterning, maskless lithography, and imprint lithography—and the best solutions for bringing them into manufacturing for 32/22nm half-pitch. May 12–14, 2008 • Bolton Landing (Lake George), NY
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