LuAG, Other High-Index Immersion Elements Get Needed Boost
Aaron Hand, Executive Editor, Electronic Media — Semiconductor International, 2/29/2008

Prospects have been relatively dim for the feasibility of high-index immersion lithography in the timeframe needed. But progress reported at SPIE, including lower absorbance levels for LuAG, may be what's needed to give it the green light. More

Software Giants and Startups Tackle Lithography Complexity
Aaron Hand, Executive Editor, Electronic Media — Semiconductor International, 3/12/2008

Every year at the SPIE Advanced Lithography conference, the EDA sector seems to gain a little more prominence. While the bulk of the presentations, particularly looking to the next generations, still focus on tackling hardware and materials issues, there is no question that the software is enabling so much of the present-day advances keeping the industry on track. More

Reference Metrology Standards: The Looming Nanotech Crisis
Alexander E. Braun, Senior Editor — Semiconductor International, 3/12/2008

As nanotechnology becomes prevalent, and lithography workarounds like double patterning maneuver into the mainstream, it is evident that for crucial measurements to continue providing reliable results, instrument calibration — reference metrology — acquires unprecedented importance. More

Sematech Buys MII Imprint Stepper for 32 nm Development
PR Newswire, 2/26/2008

Molecular Imprints announced that Sematech has purchased its latest-generation semiconductor imprint lithography system. The Imprio 300 will be delivered to Sematech at the College of Nanoscale Science and Engineering (CNSE) of the University at Albany in mid-2008 to support advanced lithography program activities. More

IBM, AMD Demo First Full-Field EUV Test Chip
Ann Steffora Mutschler, Senior Editor — Electronic News, 2/26/2008

At SPIE, research partners IBM and AMD detailed a working test chip that uses EUV lithography for the critical first layer of metal connections across the entire chip, compared to previous projects that have used EUV for working chip components that were only narrow field, and covered just a small portion of the design. More

Applied Materials: Patterning Requires Innovative Metrology
Alexander E. Braun, Senior Editor — Semiconductor International, 2/28/2008

Applied Materials concurrently held its 12th Annual Technology Forum with the Advanced Lithography conference. CTO Hans Stork was among the speakers who outlined metrology, patterning, resists and etch challenges at the 32 nm generation. More

Mapper Receives Subsidy From EU's 'Magic' Program
Staff — Semiconductor International, 2/27/2008

Mapper Lithography (Delft, Netherlands) said it has received a 3.5 million euro subsidy from the European Union's 12 million euro program to support direct-write maskless lithography. More

Sematech and Zeiss Report Progress on Mask Metrology Tool
Staff — Semiconductor International, 2/25/2008

Carl Zeiss and Sematech engineers have completed the design portion of a mask metrology tool aimed at 32 nm technologies. The Photomask Registration and Overlay Metrology system (PROVE) is expected to be ready by the end of next year. More

Rohm and Haas, IBM Tackle Implant-Level Lithography Materials
Aaron Hand, Executive Editor, Electronic Media — Semiconductor International, 2/25/2008

Rohm and Haas Electronic Materials has entered into a joint development agreement with IBM to develop patterning materials and processes to enable implant at and below the 32 nm node. More

GenISys Supplies E-Beam Software to Three Labs
Business Wire, 3/7/2008

GenISys GmbH, a provider of e-beam direct-write software solutions, today announced that three more U.S. research institutions have adopted its advanced e-beam lithography software. More

Cymer Announces Upgrades for XLA Products
Business Wire, 2/21/2008

Cymer announced the availability of high-performance (HP) upgrades for its XLA 105, XLA 300 and XLA 400 products excimer lasers. More

The Fine Print: Lithography Answers Blowin' in our Wind?
Aaron Hand, Executive Editor, Electronic Media — Semiconductor International, 2/28/2008

At SPIE's Tuesday night panel, "Future Projection Lithography: Optical or EUV?", the tone was set by IBM's Kit Ausschnitt and his latest poetic endeavor. "How many nodes must a man walk down/Before you call him a man?/Yes, 'n' how many chips must he fabricate/Before using all the sand?/Yes, 'n' how many times must the molten tin fly/Before EUV is banned?" Blog

Practical Chip Design: SPIE: The Year of EUV — Or Maybe Not
Ron Wilson, Executive Editor — EDN, 3/3/2008

In many ways this could be the year that EUV lithography happened at the SPIE conference. Sessions on the subject were packed, both with paper submissions and with attendees. An evening panel drew a similar crowd. And researchers reported solid results: patterns from IMEC, and plans for transistors from AMD. But it's still not clear whether this is the year in which we first glimpsed the low-energy X-rays at the end of the tunnel, or the year we first perceived the real scale of the problem. Blog

Double Patterning Drives Computational Upgrades
Aaron Hand, Executive Editor, Electronic Media — Semiconductor International, 2/25/2008

Brion Technologies introduced both a platform upgrade and a new product that are geared toward enabling double patterning lithography techniques at 32 nm and beyond.
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Imprint Lithography Moves Closer to CMOS Requirements
Aaron Hand, Executive Editor, Electronic Media — Semiconductor International, 2/25/2008

Molecular Imprints Inc. introduced the Imprio 300, the latest in its family of imprint lithography tools for semiconductor applications. It achieves significant improvements in throughput, resolution and overlay, putting nanoimprint lithography further along on its CMOS roadmap.
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Toppan Photomasks and Anchor Announce DFM Tool
Business Wire, 2/27/2008

Toppan Photomasks introduced a DFM tool that will shorten cycle time and reduce risk in chip design through an exception dispositioning process for identifying and analyzing defects and design errors.
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Nikon Plans Double Patterning Scanner by Fourth Quarter
Staff — Semiconductor International, 2/20/2008

Nikon Corp. said that it will begin selling an immersion ArF scanner by the fourth quarter, aimed at the double patterning exposure techniques expected to be widely used at the 32 nm generation. The tool will feature overlay improvements to meet the ~3-4 nm overlay requirements of the 32 nm node.
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April 16-18, 2008: Photomask Japan

May 12-14, 2008: Sematech Litho Forum

June 10-12, 2008: International Workshop on EUV Lithography