Semiconductor International NewsBreak Special Report
Focus on: February Issue     February 1, 2008
IN THIS EDITION...
» Embedded OPC Extends Laser Mask Writers to 65/45 nm
» Key Parameters Demonstrated for High-Volume EUV Lithography Sources
» Novel CD-SEM Overlay Method Improves Dual Trench Patterning CDU
» Double Patterning: An Etch Perspective
» Litho Factions Search for Resources
» DFM: The Changing Semi Landscape
» Movers & Shakers: NAND Flash Not Likely to Be Replaced Anytime Soon
Dear Subscriber,

Our focus for the February issue is all lithography all the time. We've had leaders in the industry address the challenges associated with double patterning etch, CD uniformity and overlay. Our cover story demonstrates a creative way to rein in mask costs by applying OPC to the mask data prior to printing using deep-UV lasers, which are much more cost-effective than electron-beam writing. In addition, we have the latest on EUV source technology. Check out these stories below or go directly to our February issue:
www.semiconductor.net/toc

Laura Peters, Lead Technical Editor
lpeters@reedbusiness.com

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Feb. 19: Preparing for High-Volume Immersion Lithography
Broadcast in both English and Japanese, this webcast will look at the most pressing challenges facing immersion lithography and the solutions that are being worked on. Panelists include: Soichi Inoue, Toshiba Semiconductor Co.; Burn Lin, TSMC; Kurt Ronse, IMEC; Bryan Rice, Sematech.
Register Now!

Sponsored by: ASML
FEATURES...

Embedded OPC Extends Laser Mask Writers to 65/45 nm
Anders Österberg, Micronic Laser Systems AB, Täby, Sweden; Steffen Schulze, Mentor Graphics Corp., Wilsonville, Ore. — Semiconductor International, 2/1/2008

Embedded OPC can significantly enhance the CD linearity and proximity performance on photomasks by applying pre-patterning CD corrections to mask pattern data. More

Key Parameters Demonstrated for High-Volume EUV Lithography Sources
Nigel Farrar, David Brandt and James Bonafede, Cymer Inc., San Diego — Semiconductor International, 2/1/2008

With extreme ultraviolet (EUV) lithography expected to be the primary high-volume exposure method beyond the 32 nm node, development of a reliable, high-power EUV light source remains a key challenge. Recent results from Cymer demonstrate power output of 100 W in burst mode. More

Novel CD-SEM Overlay Method Improves Dual Trench Patterning CDU
Ilan Englard, Rich Piech, Liraz Gershtein, Ram Peltinov and Ofer Adan, Applied Materials Inc., Santa Clara, Calif. — Semiconductor International, 2/1/2008

Using a trench-within-a-trench overlay mark and automated process control strategy, the CD uniformity issue associated with dual trench patterning can be kept within a production-worthy range. More

Double Patterning: An Etch Perspective
Raghu Balasubramanian, Andy Romano and Marshall Benham, Lam Research Corp., Fremont, Calif. — Semiconductor International, 2/1/2008

Double patterning requires new critical etches capable of sub-1.5 nm CD uniformity, pattern shrink and in situ full-stack etching. More

Dynamic Analysis Offers a Better MSA Management Alternative
Phillip H. Williams, Freescale Semiconductor Inc., Chandler, Ariz. — Semiconductor International, 2/1/2008

Just like process tools, a measurement system that can demonstrate statistically stable output should not have to undergo routine characterization. Instead, a dynamic MSA can be achieved with at-hand SPC data. More

Direct-Energy Plating: A New Electrodeposition Process for Interconnects
Steve T. Cho, Surfect Technologies, Tempe, Ariz. — Semiconductor International, 2/1/2008

A new process technology for electroplating addresses limitations of traditional plating. More

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Hear the latest research at SPIE Advanced Lithography
SPIE Advanced Lithography brings together the top researchers and engineers in the semiconductor lithography industry. See the most recent and critical developments in chip design, fabrication, and manufacturing. Join your colleagues in San Jose for the must-attend event of the year, 24-29 February 2008
Register today!

DEPARTMENTS...

Editorial: Litho Factions Search for Resources
Aaron Hand, Executive Editor, Electronic Media — Semiconductor International, 2/1/2008

What lithography techniques will the industry use to mass produce critical layers at 32 nm? Of course, if anybody truly had the answer to that question, they could probably get a little rich. But there seems to be very little in the way of answers. Or rather, perhaps there's too much in the way of answers. More

Expert Perspective: DFM: The Changing Semi Landscape
Mark Mason, Chair, Si2 Design for Manufacturability Coalition Director, Design Data Integration, Senior Member Technical Staff (Emeritus), Texas Instruments Inc., Dallas — Semiconductor International, 2/1/2008

In 2003, Chris Mack observed that the semiconductor industry "as we know it" was changing. He argued that the days of non-linear growth and exponential improvements in technology were coming to a close, and that the semiconductor industry was maturing. More

Movers & Shakers: NAND Flash Not Likely to Be Replaced Anytime Soon
Alexander E. Braun, Senior Editor — Semiconductor International, 2/1/2008

Albert Fazio, an Intel Fellow and director of memory technology development for Intel’s Technology and Manufacturing Group, is responsible for exploring and developing flash memory and multilevel cell memory technologies, as well as novel memory technology ideas. In this interview, he gives his perspective on some of the new memory technologies being developed. Listen

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Is Your Product Among the Best of the Best?
Don't miss your chance to be recognized with a 2008 Editors' Choice Best Product Award! Enter your product in the 19th annual awards, judged by Semiconductor International's editors, with winners recognized in SI's July issue, as well as a ceremony at SEMICON West. Entry deadline is March 31, 2008.
Get more information and download the entry form today!



NEW PRODUCTS...

Coat/Develop System

RF3T is a 200 wph coat/develop track system targeted for the full range of lithography applications. The system features additional parallel process modules and higher efficiency wafer transport.
Sokudo Co. Ltd., Kyoto, Japan More

Wafer-Level Vibration Sensor

WaferSense Auto Vibration System (AVS) was designed to monitor three-axis accelerations and equipment vibration to optimize equipment motion and wafer throughput. It is a wireless, wafer-like accelerometer available in 200 or 300 mm format.
CyberOptics Semiconductor, Beaverton, Ore. More

SEM/FIB

MultiBeam is a high-throughput SEM/FIB designed for IC defect analysis, circuit modification, TEM thin-film sample preparation and mask repair.
JEOL USA, Peabody, Mass. More

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Online Buyer’s Guide: Your Search Starts and Ends Here
Search Semiconductor International’s Online Buyer’s Guide for products, services and vendors, or browse through product categories. It's the comprehensive buyers guide for the global semiconductor manufacturing industry. To see the latest company listings and product information, visit:
buyersguide.semiconductor.net



 
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