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The latest information on semiconductor packaging including wafer-level and chip-scale 3-D integration, wafer bumping, die and wire bonding, and encapsulation.

  • IMEC, Synopsys to Co-Develop 3-D Stacked ICs

    Staff, March 9, 2010
    IMEC will use Synopsys TCAD tools in a collaboration to address reliability and performance concerns in through-silicon via (TSV) technology.  More
  • Gartner Sees ‘Spurt' in Capex Spending

    Staff, March 8, 2010
    Gartner said wafer fab equipment and packaging and assembly equipment both will see ~76% growth this year, led by memory companies making the technology transition to DDR3 DRAMs. Capex may slow down slightly later this year before picking up again going into 2011, analyst Jim Walker said.  More
  • Embedded Die Technology Gains Support

    Sally Cole Johnson, Contributing Editor, March 3, 2010
    Imbera PCB TS Embedded die technology is heading for volume production and may give fan-in wafer-level packaging a run for its money, predicts Yole Développement analyst Jerôme Baron. "Embedding dies into PCB laminates is another key piece of the widening 3-D packaging toolbox," Baron said.  More
  • 3-D Interconnects Shape Future Solutions

    Philip Garrou, Contributing Editor, Microelectronic Consultants of NC, February 16, 2010
    3-D Future Tech TS (021610-3-d-future-330.jpg) An IEEE meeting in Santa Clara, Calif., attracted several leaders of 3-D IC technology development, who presented a list of challenges to the TSV-creation infrastructure.  More
  • Fan-Out Packaging Dispute Resolves in IP Licensing Deal

    Sally Cole Johnson, Contributing Editor, February 3, 2010
    fan-out packaging TS (EPIC) (020410-EPIC-TS.jpg) What began as a patent dispute over fan-out packaging technologies has resulted in an IP agreement that will ultimately make it easier for packaging subcontractors to license Epic's ChipsFirst and Freescale's RCP technologies in one step, said James Kohl, Epic's CEO.  More
  • Driving Down the Cost of TSVs

    Sally Cole Johnson, Contributing Editor, February 1, 2010
    The race to drive down the cost of through-silicon vias (TSVs) is on, with new cost targets in clear view. Industry efforts are moving TSVs beyond the latest 'marketing hype' to a legitimate optional packaging method.  More
  • TI Boosts Spending on Assembly and RFAB

    David Lammers, News Editor, January 27, 2010
    TI Expansion TS (012710-TIWorker330.jpg) With demand strong for computer power ICs, LED TV backlight controllers and other analog products, Texas Instruments is expanding test and assembly capacity to meet customer delivery agreements. Also, a pilot line at the new 300 mm analog RFAB is up and running, and TI expects full production there by the end of the year.  More
  • Allvia Offers New TSV Reliability Data

    Sally Cole Johnson, January 25, 2010
    Allvia foundry TS (012510-Allvia330.jpg) Allvia is stepping forward with details about its full reliability tests, and the data may help customers decide which products are feasible, said CEO Sergey Savastiouk. To avoid CTE issues, Allvia uses a silicon interposer between two stacked substrates and connects them with TSVs. "Our target is to add passive elements on the substrate," he said.  More

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Phil Garrou

Perspectives From the Leading Edge

Philip Garrou, Consultant
November 20, 2009
3D News: Applied/Semitool, TSMC, Ziptronix
Applied By now we have all seen the headlines that Applied Materials has acquired...
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Phil Garrou

Perspectives From the Leading Edge

Philip Garrou, Consultant
November 17, 2009
RTI 3D ASIP, Aviza, Jenoptik Laser Dicing
RTI 3D ASIP It was 2004 when RTI held its first 3D conference, long before 3D...
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Phil Garrou

Perspectives From the Leading Edge

Philip Garrou, Consultant
November 6, 2009
Taiwanese Focus on 3D IC
PFTLE recently covered 3D activities at ITRI (see PFTLE, “3D IC at...
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Phil Garrou

Perspectives From the Leading Edge

Philip Garrou, Consultant
August 22, 2009
Semicon TechXPOTs
Semicon West scheduled a series of TechXPOTs during the show that were actually...
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Technical Articles

  • Driving Down the Cost of TSVs

    Sally Cole Johnson, Contributing Editor 02/01/10
    The race to drive down the cost of through-silicon vias (TSVs) is on, with new cost targets in clear view. Industry efforts are moving TSVs beyond the latest 'marketing hype' to a legitimate optional packaging method.
  • Reversing the Electronic Assembly Process

    Joseph Fjelstad, Verdant Electronics, Cupertino, Calif. 12/01/09
    By reversing the electronic assembly process, it's possible to eliminate solder and cut waste. The Occam process is a simplified approach that is reliable and cost-effective.
  • Encoders Provide Path to High-Resolution Positioning

    Wolfgang Holzapfel, Dr. Johannes Heidenhain GmbH, Traunrent, Germany 09/01/09
    High-resolution interferential encoders, when chosen, calibrated and used appropriately, are instrumental to the positioning performance of steppers, inspection tools and dicing machines.

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