Recent 3D IC Integration Activity

3D
Alliance Issues First Standard for the 3D IC
Industry

The 3D-IC
Alliance is a consortium for integrated circuit designers,
developers, and manufacturers. Its objective is to promote
standards for three-dimensional integrated circuits (3D-ICs) in
order to accelerate their availability and acceptance.

The 3D-IC
Alliance has produced the first published standard for 3D chip
designs: a specification for integrating memory and logic in a 3D
stack. This standard lays the cornerstone for memory-to-logic 3D
integration and establishes a basis for future collaborative
efforts in the industry.

The Intimate
Memory Interconnect Standard (IMIS™) defines a high-bandwidth
vertical bus implemented on the faces of a memory device and a host
device so that, when stacked and bonded, the two devices act as a
single integrated circuit. The “intimate” 3D connection
treats the memory device like embedded memory with no need for
typical chip-to-chip I/O or ESD structures. The face-to-face
vertical connections are extremely short, providing fast access and
low capacitance.

IMIS™
provides support for multiple data ports with memory busses up to
1,024 bits wide. It addresses several memory device types including
SRAM, DRAM, and Flash. The standard includes a system of pin
definitions, specifying locations and order, made as generic as
possible in order to cover a wide range of implementations. It also
contains a set of surface preparation requirements to cover various
categories of bonding methods.

This open
standard is available on the 3D-IC Alliance
website for implementation in any
chip design. By providing and promoting open standards the Alliance
intends to simplify 3D chip design and allow mainstream adoption of
3D-IC technology. Bob Patti of Tezzaron Semiconductor indicated
that “…by the end of this year, some industry participants
will be sampling IMIS-compliant components”.

2008
Advanced Packaging Award Winners Announced At SEMICON
West

Last week at
SEMICON West Advanced Packaging Magazine announced the
recipients of the 8th annual Advanced Packaging Awards,
recognizing excellence in industry innovation. In the category of
“thermal management”, Nextreme Thermal Solutions won
for their Thermal Copper Pillar Bump technology
which we have discussed previously [ Perspectives From the
Leading Edge - “SEMATECH
arrives in Albany with 3D Integration
program…contd” – Oct
15th 2007]. Congratulations to this thermal solutions start-up for
this honor.

EV Group
Files Patent Infringement Lawsuit against 3M 

On July 14 EV Group (EVG) announced that it has
filed a patent infringement lawsuit against the 3M Company. The
complaint alleges that 3M has “…infringed upon a U.S. Patent
through the marketing and sale of the 3M Wafer Support System,
which is used in the production of silicon wafers.” The complaint
seeks damages to compensate EVG for 3M’s wrongful infringement and
an injunction against 3M from all future infringement of the
Patent.

Word on the street is that were talking about USP
6,792,991 “ Device for Detaching a Carrier from a
Semi-conductor disk” (If that’s not correct, someone in
the know please leave me a message and I will retract.)
 

The basic idea of this invention is to
“……arrange the wafer / carrier(1) on another carrier(2),
before detaching carrier(1) from the wafer and while doing so
temporarily fixing the wafer once again on its surface opposite
carrier(1). In one respect this makes for easy removal of
carrier(1) from the wafer, and in another respect the wafer is then
made directly available for further processing and/or including
transport.” Specifically what is described is the
wafer/carrier(1) stack being positioned, aligned and attached to a
frame and a “foil” being attached to the opposite
surface of the wafer and frame before removal of carrier(1) (which
was used for grinding and thinning). The wafer can then be taken to
other operations such as dicing.   

While it is obvious that this patent has application to numerous
processes that require very thin die, it certainly has application
to 3D IC integration and as such becomes the first, of what I am
sure will be, many patent litigations in this area over the next
years.

For all the
latest in 3D IC Integration stay linked to Perspectives From
the Leading Edge……..