3-D Infrastructure as Seen by the IMAPS Global Business Council

Before we move on, there were a few
more presentations that I wanted to review from the IMAPS GBC
(Global Business Council) [see PFTLE “IC
Insights Predicts Fast Industry Rebound…,” March 15,
2009; and “Like
Swallows Returning to San Juan Capsitrano,” March 20,
2009]. One of the main themes for this meeting was the 3-D
infrastructure and how it is going to develop.

Amkor’s Bob Lanzone had a nice slide
comparing the different classifications of vias (shown below). The
two vias-first options (before transistors and before BEOL) are
confusing to people, and the industry is looking for a different
way to differentiate between them. Bob is going with the term
proposed by others in the past year or so — “vias
early.” That’s not very descriptive to me, but I do
agree that “vias first” should probably be defined only
as pre-transistor, polysilicon-filled vias. What does appear to be
for sure is that what Bob is calling “vias last” front
side, appears to be a last-resort option (as we have discussed
previously).

In terms of the infrastructure, in
the slide shown below, Bob proposes some options on how the
processing steps will be divided among the fab and the OSAT. My
opinion is that the ultimate resolution of this will depend on the
fab and its capabilities. In general, though, I think everyone is
agreed that foundry TSV is the best option from both an economic
and infrastructure standpoint.

Our old friend Bob Patti of Tezzaron
gave his opinion on the infrastructure as it exists today vs. 2-D
infrastructure (shown below). Being one of the leaders in this
field, his frustrations with the current infrastructure are obvious
from his slide.

Qualcomm, as a user, has certainly
been out front pushing on the supply chain to develop. Tom
Gregorich gave a very nice presentation on how things were
developing from a Qualcomm perspective. The first slide (below)
points to why companies are spending time trying to develop 3-D
technology. It’s the lure of those solid green bullets that
is pushing the field forward even though the current availability
is NIL.

When it comes to the processing
distribution between the fabs and the OSATS (SATS), Gregorich’s
next slide (below) looks a lot like Lanzone’s in that they
both support TSV in the fabs and question where the thinning,
backside processing and bonding will occur. Qualcomm questions this
from the standpoint of who will make the necessary investments.

In the next few weeks we’ll be
taking a look at:

• The Samsung 3-D roadmap that isn’t.
• Some under-the-radar spin-on glasses that could put the low-k
  roadmap back on track.

For all the latest information on
3-D IC technology, stay linked to Perspectives From the Leading
Edge……………………………