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Y.W. Lee and Samsung's Rise

Posted by David Lammers on May 15, 2008

Yoon-Woo Lee, named Wednesday (May 14) to the CEO position at Samsung Electronics Co., brings a lead-by-example attitude to his work and an aggressiveness which could propel Samsung to the top position in the worldwide semiconductor industry.

 

Lee, 62, first gained prominence as a young engineer in South Korea when he led a Korean team of DRAM designers who were asked to conduct a face-off design contest with a team of American designers who had provided Samsung with its first DRAM designs 30 years ago. At the time, it was seen as a David vs. Goliath contest, with the Americans holding all the cards. With competing designs in hand, the Korean team was deemed the winner (not a surprise in hindsight) and Samsung’s internal memory design teams gained skill and confide...Read More

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The Other 450 mm Shoe

Posted by David Lammers on May 6, 2008

The three companies openly pushing for 450 mm wafers are working on a plan to subsidize the equipment industry’s 450 mm development effort. The carrot will be large, perhaps approaching a billion dollars when all is said and done. Its increasingly clear that a combined stimulus package is needed to prompt the equipment vendors to start 450 mm development, a well-placed source in Austin said.

 

Intel Corp., Samsung Electronics Co., and Taiwan Semiconductor Manufacturing Co. Ltd. went public Monday with their support for a transition to 450 mm wafers beginning in 2012. Toshiba Corp. is keeping out of the spotlight, but also is backing the transition. The companies said the 450 mm effort will develop standards...Read More

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TSMC and the Reverse Temperature Effect

Posted by David Lammers on April 30, 2008

Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) held its annual technology symposium in Austin Tuesday (April 29), with much of the attention on the foundry’s 40 nm technology. TSMC would prefer that its leading edge customers go directly from 65 to 40 nm design rules, making 40 nm much more than an afterthought 0.9× linear shrink. In fact, TSMC will skip 45 nm and only offer 40 nm for the general (G) and (LPG) processes, with 45 nm and 40 nm offerings for the low power (LP) process which Qualcomm Inc. and others use.

 

J.C. Huang, platform marketing manager for TSMC’s advanced technology division, said in his presentation that there is no performance gain when migrating from the 65LP process to the 40LP process. Asking a rh...Read More

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The Donut Mystery

Posted by David Lammers on April 9, 2008

John Halladay, a clean process manager at Spansion’s Fab 25, brought a good mystery to Sematech’s Surface Preparation and Cleaning Conference here last week.

 

While yield losses often are at the edge of the wafer, Spansion had a donut-shaped area at the center of the wafer populated with bad die. At first, engineers thought the culprit was the trench plasma-etch process. 

 

The Spansion team brought in detectives from SEZ America (...Read More

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Industries: Clean Processing

Stir $207B Into Your Coffee Cup

Posted by David Lammers on March 27, 2008

Count Bill McClean, president of IC Insights Inc. (Scottsdale, Ariz.), among the optimists.

His forecast calls for the overall semiconductor industry to reach ~$444B by 2012, up from $237B last year. That is a $207B increase in annual industry revenues over the next five years, a compound annual growth (CAGR) rate of ~11.5%.

 

“In general, when you look out the next five years, we see moderate growth forecasts compared with the previous cyclical upturns. We don’t see any 20%+ increases in the next five years, but we do see good demand-driven years in 2010, 2011, and 2012. Each of those years should have growth ...Read More

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SEMI Austin Forum: Trust Needed to Foster Innovation

Posted by David Lammers on March 20, 2008

That phony veil of dispassion that people often hide behind slipped off at the SEMI Austin forum Wednesday. Tim Hayden, the CEO of Rite Track Inc. (West Chester, Ohio), started it, and then Kelly McAndrew, CEO of Applied Mechanical Corp. (Austin, Texas) added his own lively observations about what is going on in the United States and the wider chip manufacturing industry.

 

Hayden rose up through Cincinnati’s machine tool industry and now runs the 150-person Rite Track, which customizes remanufactured track systems for the semiconductor, thin film head, solar cell, and MEMS industries. It is a business which requires a mixture of skills, including an ability to build customized interfaces to a factory’s automation ...Read More

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Michel Mayer and the Software Challenge

Posted by David Lammers on February 8, 2008

The problems at Freescale Semiconductor Inc. which forced CEO Michel Mayer to resign today (Feb. 8), and Motorola Inc.’s decision earlier this month to put its handset business up for sale, have one thing in common: software problems.

Freescale’s wireless IC division, when it was part of Motorola Semiconductor Products Sector (SPS), relied largely on Motorola software. When SPS became Freescale it was forced to develop its own software, and the result was less than satisfactory: overcomplicated firmware and layers of software that appealed to few external customers. Motorola and other handset vendors turned to Texas Instruments and Qualcomm for their chipsets, yes, but also for a more-solid software solution riding on the silicon.

Mayer’s resignation is linked to that inability to deliver new customers for Freescale’s wirele...Read More

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On Mobility, Velocity Saturation, and (110) Silicon

Posted by David Lammers on January 28, 2008

In recent years, the chip industry has pulled a couple of rabbits out of the proverbial magician’s hat: uniaxial strained silicon and immersion lithography. Will (110) CMOS be the next rabbit?

First, please step back a decade. IBM researchers, including Min Yang and many others, grabbed on to the concept that holes move faster in (110) oriented silicon lattices. They argued that a hybrid orientation technology (HOT) would be worth the extra effort, and proffered various methods of putting the pFET on dabs of epitaxially grown (110) silicon while keeping the nFET on (100) silicon. It was complex, involving solid phase epitaxy, multi-step integration techniques,  and in most cases silicon-on-insulator (SOI) substrates.

HOT pursued higher (110) hole mobility, squeezing more performance...Read More

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SOI and the Fishkill Cosmology

Posted by David Lammers on January 2, 2008

It was nearly 10 years ago (August 1998) that IBM’s microelectronics division committed to silicon on insulator (SOI) technology for its high-end microprocessors. Last month’s announcement  that Toshiba Corp. would join the bulk 45 nm Fishkill alliance reflects the shifting picture in silicon-on-insulator (SOI) development.

Toshiba was the “T” in ASTA, the AMD/IBM/Sony/Toshiba alliance which developed SOI technology. Now, the two Tokyo-based companies are out of SOI process development, and Freescale Semiconductor Inc. (Austin, Texas) is in, working on SOI development with AMD and IBM at Fishkill.

(Both Sony and Toshiba work with IBM on research issues related to future semiconductor technology, with SOI on the agenda of that alliance, which does work at both Albany and ...Read More

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Canon Goes Wet with Ichikawa at the Helm

Posted by David Lammers on November 28, 2007

Canon Inc., according to a reliable source, has shipped its initial AS7 ArF immersion scanners to customers in Japan, a twin-stage system that the source said differs from what Canon’s competitors are offering in terms of the stage design, meniscus control, and optics.

In 2004, Canon intended to offer a new single-stage platform, first with a KrF source, with a plan to adapt it to the shorter ArF wavelength.

Then, Canon’s CEO Fujio Mitarai put senior managing director Junji Ichikawa -- a board member since 1997 and chief director of the optical business -- in charge of the scanner platform project. Ichikawa is the company’s chief hardware platform architect, who worked first on laser beam printers, then digital cameras, creating world-class products in both of those highly competitive segments.

Ichikawa immediately scrapped the...Read More

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Industries: Lithography

An Engineer's Brilliant! Tale

Posted by David Lammers on November 16, 2007

With the holidays approaching and a bit of leisure time ahead of us, please consider reading a book about Shuji Nakamura, the inventor of the blue light emitting diode, by Bob Johnstone.

It is not often that a single book combines so many interesting elements of the story that is modern-day technology. Within Brilliant! Shuji Nakamura and the Revolution in Lighting Technology are:

-- A biography of a unique Japanese man who became fascinated with the quest to build LEDs.

-- A expert look at Japan’s business and educational culture, written by one of the few Western journalists who combines Japanese language ability with an appreciation for technology.

-- Mini-biographies of entrepreneurs in the LED lighting industry – hidden gems within the 336-pages.

-- An appreciation for the interplay between machines, materials, and...Read More

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Hynix, Micron Execs Doubt Need for 450 mm Wafers

Posted by David Lammers on November 12, 2007

Resistance to the 450 mm wafer generation was evident at last week’s International Trade Partners Conference in Hawaii. During a grand finale panel discussion on the last day of the conference, Hynix Semiconductor Inc.’s CTO Jin Seog Choi was asked if and/or when he saw 450 mm wafers playing a role.

According to a source at a major equipment company who was in attendance, Choi said that 450 mm wafers would take much longer than anyone imagines, and that Hynix "has no intention to build any 450 mm wafer fabs.”

Choi’s comment brought on a spontaneous round of applause from the audience.

Micron Technology Inc. CEO Steve Appleton made a closing speech at the Maui meeting. Appleton was asked the same 450 mm question, and the Micron CEO said “we can all do the math, and it doesn't justify the enormous 450 mm ...Read More

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