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IMEC arrives in Hsinchu and other 3D IC News
February 26, 2008
Hsinchu
I have a special feeling of kinship with the island and people of Taiwan. You see, I was on the island on Sept 21st1999 and was was tossed out of bed during the 7.6 earthquake that rocked the island and caused significant damage as shown below.

The Belgian research institute IMEC will soon be feeling a similar closeness to Taiwan because they have announced the establishment of “IMEC Taiwan” in the Hsinchu Science Park. It will initially start as an office but is expected to grow into an R&D center within the coming 6 months. It is hoped that IMEC Taiwan will facilitate the access of Taiwanese semiconductor companies to IMEC’s R&D programs. A great move by both IMEC and the Taiwaneese Govt.
Where are the 3D design tools ??
Speaking of IMEC , at their last annual research review meeting this past fall, several experts addressed the question of when the big 3 EDA’s (Cadence, Mentor Graphics and Synopsis) would come out with the sofftware which everyone assumes is a prerequisite for large scale commercialization of 3D IC integration. The consistent opinion of the assembled group of experts was that without a clear market for 3D design EDA vendors are unlikely to offer tools creating a chicken and egg scenario. In support of this premise we have previously mentioned that Ted Vucurevich, CTO of Cadence has said that they would be developing 3D tool sets “...once it is clear that the market is going this way” [ Perspectives from the Leading Edge “3D discussions in the valley” Nov 4th 2007]
At the IMEC meeting, Jochen Reisinger, in charge of chip-package-board codesign at Infineon offered some good insight pointing out that this situation “…is quite normal as new EDA technologies usually get developed by startups who then get acquired by a large EDA vendor once the market reaches enough size to make it worthwhile. …the only interest we see in 3D chip design is from Zuken." An astute comment….and may I add that Bob Patti, CEO of Tezzaron Semiconductor, has been preaching the need for 3D design tools for a few years now and that Lisa McIllrath, and her company R3Logic, like Zuken has software available now that can design 3D circuits. [see Perspectives from the Leading Edge – “50$ 3D bonding coming ??; Intel announces "...we are ready" –Oct 29th 2007}
Getting on the 3D Bandwagon
The IEEE’s International Interconnect Technology Conference (IITC) this June is planning a session on 3D IC integration. “This is properly a subject for an IC interconnect conference rather than a packaging conference” claims Chief Technologist for 3D Development at IBM Michael Shapiro.
The main theme for this conference in the past has been Low K integration which, according to the ITRS roadmaps has not been the booming success that it was hoped to be 10+ years ago (see fig below). As we all know by now all of the organic Low K’s were a bust (technically and financially) and many of the CVD materials have taken way longer to integrate then ever expected.
So it now appears that even IITC has jumped on the 3D IC bandwagon claiming it is a “…..whole new way of thinking about chip design”. – WELCOME ABOARD !

My next blog will contain more preview of the March’s IMAPS Device Packaging Conference….until then for all the latest on 3D IC integration and other advanced technologies stay linked to Perspectives from the Leading Edge
Posted by Philip Garrou on February 26, 2008 | Comments (0)