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High Throughput Laser Drilling for 3D IC TSV
February 17, 2008
There will be a major presentation by XSil at the upcoming IMAPS Device Packaging meeting in Phoenix in March. In keeping with Semiconductor Internationals goal of getting you all the leading edge 3D information as soon as possible in this Perspectives from the Leading Edge blog, I”ll give you a taste of what to expect in the following paragraphs.
Without question the author / presenter Alexey Rodin is one of the world experts in using lasers for 3D TSV processing. We have previously noted that Alexey and XSil were making some significant advances in laser processing with vias down to 10 microns now possible (Perspectives From the Leading Edge - "Going Verticle in Whitefish" - Sept 9th 2007). Being maskless, the laser process obviously eliminates PR coat, expose, develop and strip processing The laser process also naturally produces sloped sidewalls which are much more conducive to barrier and seed layer deposition. In addition by controlling the laser pulses one is able to “drill” through oxide and nitride layers as well as Al, Cu, Ni and Ti metallizations. Initial announcements from memory manufacturers like Samsung have indicated that they are looking long and hard at such laser processing.
This March Alexey will show results from the X300V Ultra production tool showing that the laser drilling process is insensitive to via position on the wafer and via depth uniformity across a 300 mm wafer is currently +/- 4% and they are implementing controls so that this approaches +/- 1% in the future. It will be reported that Si removal rates exceeding 20 um per laser pulse are now possible.
For example this translates into 17K vias per minute for a 300 mm wafer with 657 die with 100 (20 um dia x 60 um deep ) vias per die ( i.e 15 wafers per hour) …or…53k vias ( 15 um dia x 50 um deep) vias per minute for a 300 mm wafer with 1000 vias per die (4-5 wafers per hour).
R&D is currently going on for vias in the 4-6 um diameter range for DRAM and logic applications. So far they have been able to achieve excellent results by proper opto-mechanical tool design.
For more dertail on these very exciting results attend Alexeys session in the IMAPS Device Packaging meeting. For more of the latest information on 3D IC integration stayed linked to Perspectives from the Leading Edge……………….
Posted by Philip Garrou on February 17, 2008 | Comments (1)
