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Foundry TSVs are a comin' - TSMC makes their play for a bigger portion of the pie
May 2, 2008
At the recent TSMC “open innovation platform” meeting they described among other things their plans to “…collaborate in the early stages of the IC design process” with their customers. My personal interest lies more in the details they disclosed about their plans for post back end of line activity. According to TSMC's new roadmap, the company is putting more resources into two areas: stacked die packages and 3D.
This announcement should be of concern to the contract assembly and test houses (Amkor, ASE, SPIL, STATS ChipPAC, etc. since such an expansion of services by TSMC will mean a potential loss of business for these assembly houses. While it is unlikely TSMC will produce stacked packages, TSMC has already developed 65-nm wirebond and flip-chip CSPs and indicated that these technologies will be expanded in 2009 for the 45 nm node.
While TSMC has avoided public comment, about 3D/TSV technology, I have reported on this blog that tools have been installed on their site for a while and they have been working on 3D processes in “stealth mode”. Whether or not TSMC will mass produce stacked 3D chips still remains to be seen, but their roadmap now makes it clear that they will offer vias first TSV as a fab option. Short term TSMC will offer “PT140”, a “post through-silicon-via technology” (read TSV) with a 140 um pitch. By the end of 2009, TSMC indicates that they will offer PT60, (TSV on 60 um pitch) and in 2010, IT17, (TSV on 17 um pitch). T.W. Karta, senior director of backend technology and services at TSMC, said it’s 3D technology would be a ''….volume service.'' But declined comment on whether TSMC or their assembly and test partners will produce the final 3D packaged devices (thinned and bonded).
This is playing out exactly as I predicted with via production rightly falling into the wheel house of the IC fabs. The question now is whether TSMC (and their rivals who I expect will now quickly have to prepare announcements to match the announcement by TSMC) will offer thinning and bonding …or…more likely .....try to control the infrastructure by steering their customers to select OSATS to finish the stack and deliver the final packaged devices ???
For all the latest in 3D integration activity stay linked to Perspectives from the Leading Edge………………..
Posted by Philip Garrou on May 2, 2008 | Comments (1)
