WLP Could Transform MOEMS, MEMS

Packaging costs of microelectromechanical systems (MEMS) still account for more than 50% of the total cost of most of these devices. Aligned wafer bonding techniques for wafer-level packaging (WLP), however, have the potential to reduce these costs, thanks to a smaller-sized total package, improved performance and shorter time to market.

This 300 mm aligned bonding platform is designed for wafer bonding consumer products, such as MEMS and 3-D interconnects.

MEMS devices typically require a specific fabrication process where the device wafer is bonded to a second wafer that effectively encapsulates the sensitive MEMS structure. This method, which is referred to as "zero-level packaging," leaves the device free to move within a vacuum or an inert gas atmosphere. These bonds are usually hermetic to prevent moisture contamination and subsequent failure of the microstructure. MEMS devices can exhibit sensitivities that must be accounted for in the packaging solution. Device performance can be affected by stresses imparted to the body of the die by the packaging materials. Emerging MEMS devices will require device-specific packaging far into the foreseeable future. Of course, protection is the key to MEMS packaging because corrosion, moisture and debris can cause device failure.

Wafer bonding for WLP is a technology in which the entire packaging process is performed at the wafer level. Although the basic WLP infrastructure has been available for several years (wafer-level capping), this technology was not adopted because existing packaging solutions met market requirements. WLP is an option when requirements for continued reduction in size and cost targets are not met with traditional chip-scale packaging (CSP). Presently, most MEMS companies have transitioned away from die-level packaging. Reducing package costs is the most efficient approach to reduce total device costs for many consumer electronics devices. Using disruptive manufacturing innovations, such as WLP rather than chip-level packaging, can provide a giant competitive advantage.

Micro-opto-electromechanical systems (MOEMS)

Focusing on the fastest-growing MEMS market segment, micro-opto-electromechanical systems (MOEMS), it is well understood that innovative packaging technologies greatly affect final device costs and also the commercialization of the final product. The global MOEMS market, driven mainly by digital mirror device (DMD) sales, is forecast to account for nearly one-third of the total MEMS device sales. With regard to WLP, MOEMS packages do require optical transparency at the operating wavelength of individual sensors and actuators in addition to the conventional MEMS packaging requirements, including electrical interconnectivity, hermetic enclosure, protection from micro-contamination, mechanical stress reduction, and the elimination of stiction.

One of the most widely adopted DMD chips available today contains far more than a million tiny moving mirrors. Each mirror is addressable and reflects light in and out of a focusing assembly. They each sit atop a torsional spring and are electrostatically actuated by tilting the mirrors between two defined states (-10°/+10°) within <16 msec. This fast switching allows grays to be emulated, and three DMD arrays are used for color. The MEMS mirrors are built on defined CMOS circuitry using surface machining of several aluminum layers. Most critical are the deposition of a low-stress torsion hinge and the placement of the landing pad. Sacrificial material is organic and removed by an oxide plasma etching process. Major failure mechanisms are surface contamination and "hinge memory" caused by metal creep.

These considerations affecting DMD functionality already demonstrate the sensitivity and complexity that must be addressed for MOEMS device packaging requirements.

Wafer bonding technologies

Wafer bonding is used for zero- and first-level packaging for stress isolation and encapsulation of controlled ambient (Fig. 1). There is a clear trend toward combining zero- and first-level packaging using interconnection technologies, such as through-silicon vias (TSVs). Bonding and electrical interconnection of the device can be realized using special electrically conductive intermediate layers for the bond.

1. Wafer bonding provides zero- and first-level packaging. At the zero-level, the MEMS device can move within the vacuum or inert atmosphere.

Because of the stacking of individual device layers, a higher degree of integration can be achieved as well. Compared with wafer capping for MEMS devices, wafer bonding has to compete in the packaging arena on the cost level with established and new back-end techniques. There are several important points for the successful implementation of wafer bonding for WLP.

Process transfer from R&D to production — Because of the very short product life cycles in consumer electronics, which can be as short as only a few months, a smooth transfer from research and process development into production is essential.

Capacity enhancement — In many cases, a specific packaging process can be transferred from one product to other similar devices. The wafer bonding platform should be designed in a way so that capacity enhancement can be easily accommodated. In consumer electronics, the lifetime of semiconductor equipment outlasts the device product lifetimes by magnitudes. A universal bond chamber gives full flexibility to switch between different wafer bonding processes without additional capital equipment expenses.

Process independence — To minimize the costs for process development and qualification, it is desirable to standardize the individual process steps. Novel wafer-to-wafer alignment techniques enable standardization independent of wafer material, size and properties.

Yield enhancement — Most wafer bonding applications have very sensitive wafer surface parameters. To achieve a high-yield manufacturing process, it is necessary to control the surface properties as tightly as possible. The key pre-processes for wafer bonding are cleaning, plasma activation and adhesive-layer coating. Integration of the pre-processes in a wafer bonding platform enables real-time process control. Because of the accurate timing of the process flow, the bonding process time can be optimized to increase capacity and throughput.

Common permanent wafer bonding technologies

The most common permanent wafer bonding technologies are subsequently reviewed and evaluated for transparent WLP for MOEMS (Table).

Anodic bonding — Anodic bonding is one of the most widely used packaging methods. Electric fields assist thermal diffusion of ions across the bond interface to achieve solid-state mixing of the optical transparent glass and silicon. Anodic bonds are very common in MOEMS because of the transparent glass lid. This type of bonding is considered to be the workhorse of MEMS packaging and accounts for the majority of all packaging applications. Advancements in wafer clamping and independent thermal processes for top and bottom chucks are key to managing thermal expansion differences and maintaining submicron alignment during whole wafer processing.

Silicon-direct bonding — Numerous materials can be bonded using silicon-direct bonding, provided the surfaces meet the rigid roughness and flatness standards. Hydrophilic surfaces created by wet chemistry or plasma activation will immediately bond on contact via Van der Waals attractions between adsorbed water groups. Following the bond, batch thermal annealing is used to transition the bonds to covalent Si-O-Si bonds and achieve bond strengths equivalent to bulk silicon. Silicon-direct bonding requires atomic intimacy at the interface, so point-of-use cleaning methods are essential in high-volume production.

Modern cluster tools capable of cleaning, activation, alignment and bonding can achieve 20 wafers/hr throughputs and are contained in Class 1 mini-environments (Fig. 2).

2. Fully automated cluster tools, such as this one, can be equipped with inert gas environmental control units to maintain a dry atmosphere during encapsulation.

Thermal compression bonding — Thermal compression bonding included three main subcategories: glass frit, eutectic and diffusion.

During glass frit bonding, the intermediate layer at the interface begins to flow under the influence of pressure when heated above the glass-softening temperature. The glasses can be applied via extrusion, screen printing, spraying or sedimentation methods. Work is ongoing to improve the properties of glass frit material, since the competition with eutectic and diffusion bonding for high-vacuum encapsulation is becoming fierce. This work is focusing on lower bonding temperatures and easier application of small bonding frames of the frit material that has transitioned to lead-free.

Eutectic bonding takes advantage of a metallurgical-phase transformation in which the binary phase formed from constituents has a lower melting point than either solute. Bonding techniques using metals as intermediate layers typically form a hermetic seal and are high-vacuum compatible (low outgassing materials with low permeability).

In essence, eutectic bonding is a special case of a diffusion bond that allows strong intermetallic bonds to be formed at relatively low temperatures. When two materials diffuse, a mixture is formed that has a very low melting point at the eutectic composition. Once the eutectic forms and becomes liquid, the reaction accelerates under the influence of liquid-phase diffusion at the liquid-solid interface.

Solid-state thermal compression bonding is similar to eutectic bonding because an alloy is formed. These reactions, however, do not involve melting of the diffused interface layer. In solid-state bonding, the key is to identify systems with low-temperature solid-state phase transformations and rapid diffusion coefficients. The phase that forms is most often an intermetallic compound that provides structural stability to the assembly.

Diffusion bonding is a type of thermal compression bonding that is generally applicable to systems in which the diffusion coefficient is rapid at a relatively low temperature. This occurs for some materials, such as gold (Au) and copper (Cu). Therefore, it is possible to create Au-Au and Cu-Cu bonds, or even Cu-Au bonds at low temperature using temperature-driven kinetics. In these cases, no alloys are formed and the interface is a mixture of the two solutes. In some applications, a diffusion bond is preferable to intermetallic or eutectic alloy formation because of the brittle nature of those alloys.

In general, thermal compression boding is also suitable for transparent MOEMS packaging — assuming sufficient temperature budget (most glasses are stabile up to 500°C and can be metallized), stability of the package and arrangement of intermediate layers (glass, frit and metals) in frames around the active area of the MOEMS device. This type of packaging is fairly uncommon in MOEMS because it exhibits higher costs than comparable bonding techniques. When ultralow leakage rates need to be considered, thermal compression bonding is the best alternative.

Adhesive bonding — Adhesive bonding with ultraviolet (UV)-curable and transparent coatings and low-k dielectrics represents the majority of packaging techniques for MOEMS. Ease of application, low material costs, sufficient bond strength and permeability contribute to the popularity of adhesive bonding for the transparent packaging of MOEMS.

Low-k dielectric adhesives are gaining attention for the packaging of MOEMS because they allow creation of electrical interconnects between different functional modules, which is a necessity for true WLP, and can be patterned using lithography. This enables inexpensive formation of bonding frames around the active area of the MOEMS.

Wafer-level transparent packaging for MOEMS

Wafer-level bonding using optical grade materials found its breakthrough with the packaging of CMOS image sensors in the 1990s. Transparent packaging technology was developed and enjoyed a strong increase in sales in the fast-growing consumer markets, particularly camera chips for mobile phones.

Many key players in this field began implementing additional functionality into the transparent package. Multiple glass wafers, stacked on top of each other with integrated micro-lens structures to realize a fully integrated camera package, is the Holy Grail now. In terms of requirements for the structural integrity of each individual micro-lens, the overall alignment accuracy of the transparent wafer stack and the introduced stress in the glass wafer stack during low-temperature wafer bonding must be improved to implement the first fully integrated optical camera package into mobile phones.

All of these applications require a low-temperature wafer bonding method with high alignment accuracy. This is usually accomplished using either a thermal or UV-curable epoxy as the intermediate layer and a separate optical alignment step before bonding the clamped wafer pair under vacuum or under a controlled atmosphere, temperature and pressure. The crucial process step is to maintain the pre-bond alignment accuracy after bonding, because the epoxy intermediate layer exhibits a certain flow characteristic before curing. Reliable clamping of the optically aligned wafers, which are separated by spacers, is the key to success. The transfer process from the bond aligner to the wafer bonding system must be controlled very accurately. Another challenge, which is addressed by special tooling solutions, is the lack of flatness of the transparent cap wafer. The equipment must flatten the wafer sufficiently to maintain the alignment accuracy after the curing process of the intermediate layer.

Endeavors to substitute glass wafers for the transparent package are already underway. Certain materials are reaching sufficient optical transparency when thinning down to a certain substrate thickness. Those materials can be bonded using direct bonding methods, exhibiting greater alignment accuracies and opening up new potential packaging applications.

For silicon and several other materials, low-temperature dry activation of wafers prior to bonding drastically improves the bonding strength at temperatures well below 300°C (Fig. 2). Yet another solution is to use high-performance transparent polymer wafers. In this case, the bond can be achieved by using curable intermediate layers or direct polymer bonding methods assisted by low-temperature plasma activation. Low-temperature dry activation has proven to allow direct polymer wafer bonding at close to room temperature.

MOEMS with moving sensors and actuators require that special attention be paid to the protection and functional integrity of these parts. Fully automated cluster tools, which are integrating bond alignment and wafer bonding modules, as well as modules for intermediate layers curing with UV or surface activation for direct bonding methods, can be equipped with inert gas environmental control units to maintain a dry atmosphere during encapsulation.

3. Wafer alignment is achieved using a new method with encoded stage motors that allow X and Y movements in increments of 0.1 µm steps and minimized Z axis travel controlled by three software-controlled spindle motors that preserve planarization between the top and bottom wafers.

Post-bond alignment accuracies with UV-curable intermediate layers typically are in the range of 10 µm at 3σ because of the flow characteristics of the intermediate adhesive prior to curing. For direct bonding methods with plasma-assisted fusion bonding, post-bond alignment accuracy of <1 µm at 3σ was successfully shown with a new alignment technology that uses two microscopes for alignment — rather than using a single microscope in between the wafers (Fig. 3). One microscope is placed above and the other below the wafer stack. The dual microscopes focus on a common focal plane calibrated for each alignment. Each microscope objective observes one alignment key on the wafer's surface.

Conclusions

Disruptive manufacturing innovations such as WLP present a tremendous cost savings advantage for MEMS devices that will help ensure their adoption into the consumer electronics market.

MOEMS packages do require optical transparency at the operating wavelength of the individual sensors and actuators, in addition to conventional MEMS packaging requirements like electrical interconnectivity, hermetic enclosure, protection from micro-contamination, mechanical stress reduction and the elimination of stiction. For MOEMS with moving sensors and actuators, special attention must be paid to the protection and functional integrity of these parts.