Ben Tsai, KLA-Tencor Corp. Group Vice President and CTO for Systems

Ben Tsai began his career at KLA-Tencor Corp. (San Jose) in 1984 as a member of the technical staff at KLA Instruments, where he helped develop the industry's first automated wafer inspection system. Throughout his career at KLA and KLA-Tencor, he has held a number of management positions. From 1992 to 1994, Tsai built up and led the engineering team at KLA-Acrotec, a Japan-based flat-panel display joint venture between KLA and Japan Energy. He became CTO for KLA in 1994 and held it for five years, after which he became general manager of KLA-Tencor's Wafer Inspection Division for a year. In 2000, Tsai reassumed the role of CTO. He has an M.S.E.E. and a Ph.D. in electrical and computer engineering from the University of Illinois. KLA-Tencor supplies process control and yield management solutions for the entire wafer fabrication process.

SI: What do you see as the role of CTO, and what does the CTO bring to the mix?

Tsai: In our industry, the CTO's role isn't as well defined as that of the CFO, for example. At KLA-Tencor, the CTO has what I consider to be a unique position — a result of how we have evolved over the past decade. My responsibilities lie in three areas. The first is the technical aspect of our corporate strategy. For example, I review the architecture and technology selection of every one of our products during the early phase of the development. It is my goal to see that we make the best selection before it's passed to the CEO for approval.

Secondly, I'm responsible for attaining and sustaining technology leadership for our products. I manage the R&D project portfolio, which includes projects in the central R&D group, as well as those of all our divisions. I review these to ensure that the R&D portfolio will enable us to attain the desired technology leadership.

My third area of responsibility is analogous to that of VP of engineering in other companies. At the corporate level, I oversee engineering projects to ensure a successful execution, and to ensure the technology and experience acquired is shared across different projects. Over time, we've learned that technology and innovation don't matter if they aren't executed and brought into the marketplace in a timely fashion. Because I'm responsible for both technology and engineering, there's less of the traditional conflict between the R&D and engineering organizations, and everything proceeds along a smoother track.

SI: During the past downturn, have you had to change KLA's technology roadmap to adjust to the new realities?

Tsai: During downturns, we continue to maintain our technology roadmap because our customers continue to invest in R&D. With this particular downturn, however, there have been a few changes. For one, customers are much more sensitive to equipment effectiveness and CoO. We've increased our focus here to ensure that, in addition to technological leadership, we also offer competitive CoO.

Another emerging trend that influences our product roadmaps is a change in the leading applications. In the mid-1990s it was connectivity. Now, we see a shift toward the consumer electronics area and, with it, an increased emphasis on system-on-chip technology. SoC drives two major requirements: complexity and fast turnaround time.

Coming out of the downturn, I also see more attention being focused on equipment agility. Performance concerns are always on top, but the spotlight is now on attaining optimal equipment performance with a minimum of setup time. You may have equipment that is first-rate in terms of steady-state throughput, but you want the tool to also have high transient performance to enable the user to change recipes quickly — much like the case of a reticle on a stepper — with a minimum of downtime.

SI: For years, the ITRS has been the industry's compass. How do you view it?

Tsai: The ITRS roadmap serves as an excellent guideline, although it's important not to be too closely bound to it. Like all useful tools, it has its limitations and basic assumptions, so it's important that you be aware of these when using it. That being said, we find the roadmap to be very productive in some areas. For example, it helps us to sort through many of the technologies on the customers' side. It performs a very high-level selection of what makes it to the second round in terms of new materials — which low-k is likely to be successful, which high-k is likely to be used. This gives us a good starting point, but too often customers have different emphases and, naturally, the roadmap doesn't capture this.

SI: The battle between standalone and integrated metrology promises to intensify with increasing shrinks and more complex processes. What do you see happening?

Tsai: The concept of integrated metrology is extremely attractive — you're getting process control closer to the tools and processes that are being controlled, with potentially less reaction time needed. However, to meet many of these expectations, you must equal or surpass the performance that a standalone system provides today. Often, the technology required to attain this level of performance is inconsistent with the goals. On the other hand, whenever there is a case where integrated metrology can provide performance sufficiently good to provide feedback, then it makes sense. If a simple measurement, for example, is required for a process of high variability, such as film thickness measurement in CMP, integrated metrology certainly provides value.

With more challenging performance areas such as lithography, where you want to contribute to — and help maintain — a very tight process window, and measurement performance requirements are much higher, the adoption of integrated metrology doesn't appear to be proceeding as quickly. For very complicated processes, one also must consider the adoption cycle. It's risky enough to qualify a scanner, the track, and then on top of it qualify the integrated metrology. Since everything is so interrelated, one can risk having a lengthy qualification cycle.

SI: Over the next of couple of years, which applications do you expect may migrate to integrated metrology?

Tsai: In general, I believe defect management will remain mostly standalone. Perhaps some of the parametric areas will move toward integrated. It's difficult to predict, since much depends on the commitment by the suppliers and the customers, as well as the cost-effectiveness of the integrated solution.

SI: New materials have affected practically every aspect of chip fabrication. What effect do you see them having on metrology?

Tsai: We have a process whereby we systematically and regularly ask each division to indicate for their product lines how new processes or materials, or customer process changes, may affect their measurement techniques. This way, we're rarely surprised. Take SOI for example, where we have to worry about the multilayer structures of films; this affects the technology selection for our non-patterned wafer defect inspection tool that finds small particles and crystal defects. In this case, we select a technology that minimizes the confusing interference originating from multiple layers, while obtaining good detection capabilities.

SI: What are the major challenges that metrology will face over the next five years?

Tsai: The lithography roadmap is uncertain, and everyone now believes that 193 nm immersion will be the next lithography technique. Meanwhile, process windows are diminishing to the point at which metrology tools must have unparalleled precision, while contributing practically zero to process window uncertainty. So, we not only have to control tool precision, but also be actively involved in ensuring that whatever we measure has good correlation to what the customers want to see on the device. We now must be involved in the whole measurement methodology to maintain this correlation.

SI: As shrinks and other factors progress, isn't metrology becoming increasingly intrusive? Aren't we reaching Heisenbergian conditions and influencing what is measured?

Tsai: That's true. A good example of this is 193 nm resist. When you attempt to measure it with a SEM, the attempt alters it. This is a challenge, because metrology technologies now must measure without changing too much what they're measuring. Even on the inspection side, we have difficult choices to make. In some inspection cases, to get high resolution, we would need high-intensity DUV lasers, but an intense DUV laser can alter certain materials' characteristics. This drives us to also use other technologies.

SI: What do you think the impact of offshoring is on the industry in general, and metrology in particular?

Tsai: The pressures on equipment cost-effectiveness — development and manufacturing costs — that resulted from the downturn have further pushed the industry toward that practice. Offshoring must be used effectively — and often carefully — to lower development and manufacturing costs, but not in a way that compromises development schedules or IP. Like other equipment companies, we've done some offshoring of software and achieved important savings. However, we're much more careful with things that are IP-intensive, or affect the overall product concept — particularly those that require close interaction between engineering, manufacturing and customers. These are still done at headquarters.

SI: So, until the present IP and currency concerns are cleared up, you don't see KLA proceeding much beyond what you're doing now?

Tsai: We're proceeding very cautiously, and if we move into a new area it's because we think that the balance between risk and reward makes sense. Silicon Valley is still the main engine of innovation — there are many gifted people here. In terms of idea generation, we have critical mass here. Minds, however, must be stimulated by other minds, and I don't just mean the interaction that takes place at work, but with neighbors, communities and academia. This kind of innovative environment isn't going to be recreated elsewhere overnight.

SI: Do you think that Silicon Valley's engineering structure has been damaged by excessive offshoring?

Tsai: I don't believe I've seen that yet. It's definitely a potential concern. The great thing about Silicon Valley is that we can tap into the best engineers all over the world — they're attracted here from all over the world, so in that respect I am not concerned.

SI: If someone provided you with unlimited resources, but specified that you could use them to solve only one problem in metrology, which would it be and why?

Tsai: The lithography advanced process control (APC) area. Lithography limits our customers' ability to meet Moore's Law. To a great extent, the pace of R&D, or progress on shrink and performance, is dictated by lithography. Lithography's APC is an interesting problem. Today, when you do design and layout, you must take into account lithography capabilities. When you design the lithography tool, you must think ahead to what operations it will carry out and what control factors it will need. This is an enormous, extremely complex system that needs optimizing. This complex control and optimization challenge fascinates me.