Elpida uses immersion litho for 50-nm process DDR3 SDRAM

The 50-nm process DDR3 SDRAM was developed using 193-nm immersion lithography technology and copper interconnect technology and has a chip size of less than 40-mm-squared.

By Suzanne Deffree, Managing Editor, News -- Electronic News, 11/26/2008

Elpida Memory Inc today announced that it has completed development of its 50-nm process DDR3 SDRAM.

According to the Tokyo-based company, the memory features the lowest power consumption in the industry at 2.5-Gbps ultra high speed and a 1.2V low voltage operation based on the industry's smallest chip size.

The 50-nm process DDR3 SDRAM was developed using 193-nm (ArF) immersion lithography technology and copper interconnect technology and has a chip size of less than 40-mm-squared, Elpida said.

The company said further that the memory operates on DDR3 standard 1.5V supply voltage and also lower voltages of 1.35V and 1.2V.

Elpidia is targeting the DDR3 SDRAM initially at high-end desktop PCs, but said application is possible elsewhere and recognized the current shift away from DDR2 SDRAMs in notebook PCs and server equipment. Elpida said it is also aggressively developing 50-nm process products for high-end digital consumer electronic products and its Mobile RAM line.

Mass production of the 50-nm process DDR3 SDRAM is scheduled to begin in Q1 2009. Elpida had suggested in October that production could start as early as late December.