In-House Manufacturing Remains a Core Competency at Advantest

While most of the automated test equipment (ATE) market has shifted to outsourced manufacturing, Advantest steadfastly relies on its own in-house manufacturing, assembly and qualification in Japan's Gunma Prefecture.

Sally Cole Johnson, Contributing Editor -- Semiconductor International, 10/9/2008 8:52:00 AM

Outsourcing to low-cost regions has become a strategic part of most automated test equipment (ATE) manufacturers’ business models, but Advantest Corp. (Tokyo) hasn’t taken that route. The company is sticking with in-house manufacturing, assembly and qualification — based on efficient Toyota-production-type operations that can minimize inventory and cycle times.

“Advantest considers manufacturing a core competency and one of the primary ways we are able to give customers an advantage,” said R. Keith Lee, president and CEO of Advantest America Inc. “We made the decision to buck the current trend and keep our manufacturing in-house because we believe it’s critical to both our quality and ability to deliver products reliably, in the quantities needed by our customers. Our manufacturing systems and processes enable us to produce high-performance products and also be a reliable business partner. We have flexibility because we aren’t competing for outsource manufacturing capacity and our high-capacity manufacturing capabilities can ramp quickly to meet our customers’ changing needs.”

Advantest’s R&D, however, has spread outside Japan, although it’s still primarily focused in Japan, according to Doug Lefever, Advantest’s director of business development. The company has an R&D group in Santa Clara, Calif., which focuses on development of instruments for the company’s testers. Advantest also recently acquired a division of Credence, headquartered in Germany, that’s focused on automotive solutions.

How is test changing? “Test only exists to the extent that it’s less expensive to do testing than to throw away a finished product or allow defects into the field,” Lefever explained. “In most cases, the math still favors testing because customers don’t want defects or a finished packaged device that ends up failing. Test is still viewed as sort of a non-value-added step, and is heavily scrutinized in terms of how much and what type. Each customer has their own approach, so the real question is now where we see test and where we don’t. It’s very dynamic, and each customer seems to have a different philosophy about how they want to shift test. Some customers want to shift it forward at the wafer level and do as much functional testing as they can there, but others see the wafer test as a simple test and want to minimize the capital expense at that level and put their effort into areas like higher parallel test at a functional level, or even a system level, to get the most out of the capital at that step.”

Advantest is also seeing some interesting new requirements in the movement of test flow. “Keeping up with customers’ roadmaps in terms of where they want to put their energy into test is now the big question,” Lefever said. “We’re also seeing step functions in areas where customers want to do parallel test, so there’s been an incremental move from 1 to 2 to 4 to 8. On the memory side, it’s all the way up to 512 and will reach 1024 soon. In both cases, in the memory and SoC [system-on-chip] markets, we’re seeing customers want to do a step from those current parallelisms.” Customers don’t simply want an increment doubling anymore. That’s going to require a shift entirely in how test and handling equipment are viewed.

Earlier this year, Advantest unveiled an RF test cell solution that consists of its T2000 LS mainframe configured with a 36-port, quad-core, 12 GHz RF module, integrated with a handler using a low-noise, highly parallel device under test (DUT) interface. It’s designed for testing four RF devices in high parallelism, and also boasts a number of optimized features to provide semiconductor designers, manufacturers, and assembly and test companies with high performance, high accuracy and turnkey ease of use. “The same complexities that drive us on the tester side in terms of developing high-throughput, high-parallel solutions become exponentially more complicated when trying to hook it up at the package level with a handler,” Lefever said. “The electromechanical connection between those two pieces of equipment is really a difficult challenge, and we design and manufacture all three pieces of the puzzle at Advantest.”

Advantest’s RF test cell solution incorporates a fully integrated 12 GHz quad-core monolithic test module.

One huge ATE challenge is the divergence of tools used for design verification vs. those used in high-volume manufacturing (HVM). “For example, a company would need to do design verification of a device that’s going to be used with high-speed I/O interfacing,” Lefever explained. “But with HVM, it’s too expensive to have all of these high-tech instruments in a tester, so IC manufacturers are putting more self-test into their devices for the production to allow for high-parallel, lower-cost ATE. And there’s this need at the verification/validation stage to have the necessary highly capable instrumentation, while at production testing there’s a different need. Figuring out how to maintain this bilateral focus is one of the biggest challenges facing ATE companies right now.”

Looking forward, another big ATE challenge Lefever sees is the smart use of R&D. ATE companies spend ~12-18% of their sales on R&D every year, so picking the best opportunities on which to focus R&D budgets is critical. “We have lots of exciting roadmap products in memory and non-memory handling, so based on our understanding of the marketplace and our challenges, Advantest feels very good about where we are with our technical roadmaps and in terms of our balance sheet,” he added. “We’re working through the downturn and global economy, and we’re in a very healthy position.”