Seiko Epson Says Resin Bumping Reliable
Seiko Epson Corp. said its resin-based gold bumping technology has passed reliability tests, leading to its use in applications such as HDTVs. The approach enables display engineers to mount driver chips onto a glass board, using less gold and tighter 20 micron wiring pitches.
Kenji Tsuda, Asia Contributing Editor -- Semiconductor International, 9/10/2008 9:46:00 AM
Seiko Epson Corp. (Tokyo) has disclosed technical details and reliability results concerning its proprietary resin-based gold bumping technology announced last year. The approach enables display engineers to mount driver chips onto a glass board with a higher-density 20 μm wiring pitch, leading to applications such as higher-resolution, full-HDTV televisions.
Epson said its resin-core bumping’s advantages include lower costs by using less gold and higher-density mounting. A conventional fine-pitch interconnect technology uses gold metal bumps that are 20-30 μm thick, and an anisotropic conductive film (ACF). In interconnect pitches of 20 μm or less, conductive metal particles in an ACF resin may cause an electrical short. If metal particles are smaller, an interfacial resistance between the gold bump and the metal particles may increase, leading to lower performance.
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| A gold film bump on a chip is mounted on a glass board through a non-conducting film. |
Epson unveiled reliability test results, comparing resin-core bumping to ACF resin technology. The reliability test was conducted as a combination of conventional gold bumps and an ACF board, and as a combination of the resin-based gold bump and the NCF board. After measuring resistivity at many connections, the conventional approach showed a large variation of resistivity, 4-10 Ω, while the Epson resin core bumping was nearly 4 Ω. After a temperature cycle test of 300 cycles from -40 to 80°C, the conventional gold bump plus ACF showed a 5-40 Ω increase of resistivity, while the new resin-based bump plus NCF showed a <1.5 Ω increase even after 1000 cycles.
The new technology produces a round-shaped resin in the bump region and forms a gold thin film 5-15 μm wide and 0.5-1 μm thick. The thin gold film technology facilitates a reduction of the linewidth compared with conventional gold plating. It reduces the material cost, and is easily produced by sputtering. The round form of the resin forms by curing the photosensitive and negative resin film at 200°C after patterning the resin film. The surface tension at that temperature forces the resin to form a round shape.
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| Epson claims its resin-based gold film bump delivers a finer pitch assembly. |
Epson engineers prototyped and tested four patterns with lines and spaces (L/S) of 5/15 μm, 10/10 μm, 10/20 μm and 20/10 μm. The results showed a 1.5 Ω increase for the 5/15 μm chip after 1000 temperature cycles, but a <1 Ω increase for the rest of the tested chips. They also prototyped a 10 μm pitch sample, but did not disclose the reliability test results.
