Alchimer Claims 'Fully Wet' Via Solution
Alchimer SA said experiments have shown that its “electrografting” technology can handle deposition of the insulation, barrier and seed layers in through-silicon vias (TSVs). The privately held company also said its technology is being adopted by the CMOS image sensor vendors.
David Lammers, News Editor -- Semiconductor International, 8/1/2008 7:49:00 AM
Alchimer SA (Massy, France) said it has achieved wet deposition of the insulation and barrier layers inside high-aspect-ratio through-silicon vias (TSVs). Steve Lerner, CEO of Alchimer, said experiments at Alchimer have proven the feasibility of the company’s goal: to replace dry vapor deposition with less expensive wet processing using low-cost electroplating tools.
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| Alchimer said early proof-of-concept experiments have validated its electrografting approach for insulation, barrier and seed deposition in TSVs. |
"Dry vapor deposition processes are prohibitively expensive in TSV fill applications, and they are holding back adoption of the 10:1 and greater aspect-ratio TSVs demanded by the Sematech and ITRS roadmaps," Lerner said.
“Chemical formulations” at Alchimer have shown that it will be possible to use the electrografting approach in a “fully wet” manufacturing solution, allowing the same tool to be used for barriers and seeds. “This is at the beaker level, using coupons, in a mini-reaction. We can prove out the chemistry there,” he said.
The late development will completely eliminate all dry processing techniques from TSV metallization, cutting the cost of ownership of the via stack by >50%, he said.
The Alchimer approach is being licensed to chemical and electroplating vendors now, he said, declining to elaborate as negotiations are ongoing. He said the early work has shown that it is feasible to produce conformal insulation and barrier layers inside a TSV with aspect ratios beyond 10:1, even on the highly scalloped TSV etch profiles produced by the DRIE/Bosch process. "Alchimer's electrochemical techniques take a completely different approach to deposition and outperform PVD on both cost and performance metrics.”
Interconnect schemes based on TSVs represent one of the key next-generation manufacturing challenges. The Sematech roadmap and ITRS call for a TSV aspect ratio of 10:1 immediately. Lerner said while it is possible to produce similar structures using PVD, he claimed that it is “an extremely expensive process for what should be a simple interconnect.”
“Line-of-sight processes like PVD struggle to produce conformal coatings, resulting in poor via fill with undesirable voids. Dry processes have thus been cost and performance roadblocks to the adoption of 3-D interconnection technology,” Lerner said.
The company’s technology is now being adopted in CMOS image sensors that use TSVs, he said.
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