Funding for ISMI 450 mm Effort Doubling
David Lammers, News Editor -- Semiconductor International, 7/22/2008 9:28:00 AM
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| Tom Abell, ISMI |
Abell said he and other ISMI managers met with “four or five suppliers” during SEMICON West, raising the total number of equipment vendors that have had face-to-face meetings with the 450 mm staff to ~20. “There is a huge range of support,” he said.
ISMI’s goal remains to have a full pilot line ready by 2012, though it could be between 2016 and 2020 before the industry in general begins building volume 450 mm fabs, said Alan Allan, a staff engineer in Intel Corp.’s (Santa Clara, Calif.) technology and manufacturing group.
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| ISMI presented its 'key messages' on the 450 mm wafer debate at SEMICON West 2008. |
However, several equipment industry representatives, including executives from ASML (Veldhoven, Netherlands), Lam Research Corp. (Fremont, Calif.) and Tokyo Electron Ltd., (Tokyo) appeared at a SEMI-organized event on the final day of the show (July 17) to argue that the likely return on investment (ROI) for 450 mm R&D does not justify the expense.
Dave Hemker, vice president of new product development at Lam Research, said the RF power needed for a 450 mm etch tool, for example, does not scale linearly as wafers increase from 300 mm to 450 mm in diameter. Moving to 450 mm substrates would require a much more costly design for plasma etch and deposition tools, he argued, showing simulation data with a steep knee curve. And SEMI Vice President John Ellis said the larger wafers would require much more expensive lithography and ion implant solutions, among others. SEMI recently developed a white paper on the economics of the 450 mm transition.
The reluctance of the equipment industry, however, is not slowing down interest by the largest chipmakers. ISMI Director Scott Kramer said the ISMI members have more than doubled the budget for the 450 mm program, largely to bring up the 450 mm Interoperability Test Bed at Sematech’s Austin facility, where automation and metrology equipment is being installed. “Intel, TSMC and Samsung in particular have increased the amounts they are spending on the 450 mm program. They have authorized supplemental spending,” he said.
Asked if the pro-450 chip companies are pooling resources to fund R&D at the equipment companies, Kramer said, “We are looking at a variety of approaches to 450 mm R&D. We are working that funding issue very hard, and what I can say at this point is that there is a sense of urgency to get something done along those lines.”
Wafer thickness R&D
The test bed is working with 925 µm thick polysilicon “mechanical” test wafers to test out robots and fab automation equipment. However, a standards debate continues over whether the crystalline silicon wafers could be thinner. Wafers of thicknesses of 900, 875 and 850 µm are being tested. “The test bed is developing a massive amount of data, based on deflection measurements,” Abell said. “Thinner wafers would allow more of them to be sliced from a single ingot.”
The researchers are considering whether four or five support points beneath the wafer would be the best approach to reduce sag, or whether two longer fingers would better support the wafers. Key points from ISMI's presentations at SEMICON West, including information on wafer sag, wafer thickness, and other issues, are available on the Sematech public site.
Kramer said the members have received “strong guidance” that fabs with the same ceiling height as today’s 300 mm fabs should be in the 450 mm standard so that older buildings can be retrofitted as 450 mm fabs. Abell noted that “the shortage of skilled construction workers” remains one of the reasons to move to 450 mm. He recalled the late 1990s, when Asian companies were “going crazy” to build 300 mm fabs until the “Asian flu” economic crisis hit.
At a Sematech reception during the show, Allan said the average cost to process a wafer increases by ~5% a year, as boosters such as strained silicon, high-k dielectrics, immersion lithography, and other new technologies are brought in. Traditionally, the chip vendors have offset those higher wafer processing costs with shrinks every two years or so, and then by moving to a larger wafer size.
“None of the fundamental assumptions have changed” about unit volumes, average selling prices, wafer transitions, or other industry dynamics, Allan argued. If anything, the movement toward solid-state disk drives (SSDs) has increased interest by the NAND vendors in 450 mm wafers, he said.
Abell, an Intel assignee to ISMI, said he will go on sabbatical leave soon and return to ISMI in the fall as a 450 mm strategic planner, serving as an advisor to Kramer. Tom Jefferson, another Intel staffer, will take over soon as the 450 mm program manager.
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