Improving the Way We Change Materials
Patterning and new materials are probably the greatest grand challenges in semiconductor processing for the next 3-5 years, according to a panel at a Praxair event held Tuesday at SEMICON West.
Laura Peters, Editor-in-Chief -- Semiconductor International, 7/17/2008 8:00:00 AM
Patterning and new materials are probably the greatest grand challenges in semiconductor processing for the next 3-5 years, according to a panel that included Ken MacWilliams, vice president and general manager of Applied Materials’s Maydan Technology Center (Santa Clara, Calif.); Gurtej Sandhu, director of advanced technology R&D at Micron (Boise, Idaho); David Watts, manager of BEOL technology development, IBM Systems and Technology Group (Hopewell Junction, N.Y.); Prashant Majhi, Intel Assignee to Sematech (Austin, Texas); and Lisa Fanti, director of R&D at Praxair Electronics (Orangeburg, N.Y.). Gathered by Praxair and held parallel to SEMICON West on Tuesday, the panelists outlined the challenges and likely solutions to materials issues going forward. “Patterning is the biggest headache at 32 nm and beyond because we have to build multi-level structures with decreasing dimensions but increasing topography, so things are not getting easier,” Watts indicated.
It seems clear that the initial approach to double patterning that involves expose/etch and expose/etch will not be cost-effective for any manufacturer. Sandhu commented that the new resist freezing approaches that are just now becoming available look very promising as a method to lower cost because only one etch is needed. Even still, he said that 3-4 nm overlay is the best being quoted so far for double patterning, “so eventually we do need EUV.”
MacWilliams suggested that the industry begin thinking more outside the box to consider what material combinations work best and what phase of a material is best for providing the necessary electrical properties. “It’s important to look beyond the periodic table,” he said.
The panel discussed the critical interaction between front-end and back-end groups now that metals are being used at the transistor level and increasingly significant issues occur between Metal 1 and the contact. “Topography from the front end impacts the patterning ability on the back end,” Watts said. He added that the short-loop processing that drives learning is very useful and necessary, but when it comes to multi-level interconnects, learning on fully integrated wafers is necessary too. “Often we get into problems there,” he said.
Sandhu discussed how NAND is the clear driver for scaling, while DRAM is the driver for 3-D structures and high-k materials. “We are looking at needing a new high-k material every three years, and right now the magic material for the next generation doesn’t seem to exist. A nanomaterial is the leading contender for next-generation NAND cells,” he said.
An attendee at the panel discussion asked whether there were significant metrology challenges ahead. “Certainly we’d like to have physical evidence for all electrical properties, but not having these measurements does not stop us from producing devices,” Majhi said. He gave the example of strained silicon and how engineers cannot measure strain in the channel of devices, but with proper process control, the necessary strain levels can be achieved.
That led to a very critical issue — the consistency of material quality delivered to fabs is essential to delivering high-yielding devices. “One area where we don’t do as well as we could is consistency. We need the right material, but then we also need to know that material will not change batch to batch and day to day,” Watts said.
In the area of collaboration, the industry still grapples with separating pre-competitive research and competitive research. Fanti said that a tremendous challenge is determining which innovations to pursue among the many that are presented. “We also need feedback right after we deliver a solution to know whether it is working and what needs to be changed,” she said. MacWilliams made a good point about intellectual property (IP). “We need a better model for determining who owns IP in different situations,” he said.
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