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IMEC Aims for Less Solar Silicon

IMEC (Leuven, Belgium) is developing a way to make solar cells more cost-effective, producing ~50-µm-thin crystalline silicon wafers using tools already available in the industry.

Aaron Hand, Executive Editor, Electronic Media -- Semiconductor International, 7/16/2008 10:00:00 AM

Although the photovoltaics industry has seen incredible growth in recent years, the industry has been hampered by the cost and availability of polysilicon materials. IMEC (Leuven, Belgium) is developing a way to make solar cells more cost-effective, producing ~50-µm-thin crystalline silicon wafers using tools already available in the industry. Adding a silicon foil layer on top of a low-cost substrate is a promising solution to reduce the amount of high-grade silicon used.

IMEC is pursuing various paths to produce the crystalline silicon foils at an acceptable cost, and one promising method is a lift-off process that requires only the use of a screen printer and belt furnace; no ion-implanted or porous layer is needed.

The method screen prints a metallic layer on top of a thick crystalline silicon wafer, which is then annealed in a belt furnace. When the wafer cools, the mismatch of the thermal expansion coefficient between the metal and silicon induces a stress field in the substrate. The growing stress field causes a crack in the silicon that is close to and parallel with the surface, causing the top layer of the silicon and the attached metal layer to snap off from the parent substrate. The metal layer is removed from the silicon foil in a metal-etching solution, resulting in a clean and stress-free ultrathin silicon foil. The substrate can be reused to peel off more layers.

Ultrathin crystalline silicon foils can be produced to reduce the amount of high-grade silicon used in solar cells. This image shows the surface that has been cut from a thicker substrate.
Ultrathin crystalline silicon foils can be produced to reduce the amount of high-grade silicon used in solar cells. This image shows the surface that has been cut from a thicker substrate.

IMEC researchers have already produced 25 cm2 silicon foils that are 30-50 µm thick. They have demonstrated the process on both single- and multi-crystalline silicon, as well as on Czochralski (Cz) material with different orientations.

One of the resulting thin Cz foils was further processed into a solar cell using a heterojunction emitter process. The 1 cm2 cell reached an efficiency of 10.0%, without back-surface passivation or intentional surface texturing, indicating that the quality of the material is largely preserved during the lift-off process, despite the large stresses involved. IMEC expects to reach much higher efficiencies with added surface passivation and texturing.

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