Applied Materials Looks at Life Beyond EUV
Alexander E. Braun, Senior Editor -- Semiconductor International, 6/3/2008 7:52:00 AM
 |
Focused on “New Dimensions to Moore’s Law,” the event featured presentations by Dan Hutcheson, CEO of VLSI Research (Santa Clara, Calif.); Chris Malachowsky, a founder of NVIDIA (Santa Clara, Calif.); Klaus Schuegraf, vice president of technology at SanDisk (Milpitas, Calif.); Scott Becker, co-founder, president and CEO of Tela Innovations (Campbell, Calif.); and Tom St. Dennis, senior vice president and general manager of Applied’s Silicon Systems Group.
 |
| Dan Hutcheson, CEO of VLSI Research |
Whatever the solution is, it will be done on silicon, apply spintronics and carbon nanotubes (CNTs) may play a role. While we are coping well with the materials problem, lithography is the industry’s Gordian knot. If extreme ultraviolet (EUV) happens at all, it will be the road’s end. Eventually, semiconductor technology will face a world without lithography. “I can provide no solutions,” he said, “it’s an engineering and science question and our children and grandchildren have a lot of work to do.”
 |
| Chris Malachowsky, Co-Founder of NVIDIA |
Computing is entering a visual age. While the technology is still far from producing a faithful recreation of reality, images — in games, for example — look pretty good. Then there are the tricks that can be done to deceive the eye; for example, imaged walls are usually rectangular, rounded objects are avoided, as is clutter of any kind. Anything that requires considerable detail is depicted as being distant. Meanwhile, progress continues toward depicting a more “real” reality. Malachowsky showed a 1.4 billion transistor chip, and claimed to have unlocked the mathematical horsepower that underlies advanced graphic capabilities, putting them in the reach of a standard C programmer. This transforms a processor aimed at graphics into a powerful parallel computer on a chip, where CPUs are multi-core and can solve an extremely parallel problem in graphics or any arbitrary problem that can use this capability.
Malachowsky recalled when a “one-size-fits-all” cell phone was satisfactory. Today, there are many varieties with various functionalities and appearances; consumers expect optimized and customized devices. “The most personal computers are bound to be something that you carry,” he said. We have gone from very fixed-functioned devices to highly programmable ones. Malachowsky mentioned that the combination of these high-end, high-performance microprocessor and high-end GPU resources is being used by the National Weather Service in its predictions, research for various sciences, and image-processing in medical applications; not just for gaming.
The presentation ended with a set of statistics showing how this sector of the industry has progressed. While these devices’ I/O has not changed much, pin functionality has increased. In the internal memory area, unlike a microprocessor, where two-thirds of the die are large caches or register files, these devices at most are 20% memory, which puts a different demand on their fabrication line than a straight memory or CPU. Die sizes have increased fourfold, and there has been a six times increase in design rules and constraints.
 |
| Klaus Schuegraf, Vice President of SanDisk |
It is challenging to keep on track with 30 and 20 nm series of scaling progressions — a new node every year. Schuegraf explained that these two nodes were done with immersion printing. Beyond that, there are double patterning (DP) solutions that should extend current lithography until EUV. However, it is uncertain that, beyond 20 nm, DP will be a fully adequate solution. Because EUV’s coming is, at best, uncertain, alternative approaches are considered.
The question becomes how to build beyond the 10 nm regime. For instance, polydielectric scaling faces a fundamental constraint. Typical interpolydielectric must fit between adjacent cells, which are ~15 nm, so if two must be in an electrode, this adds to 30 nm per cell, limiting scaling capability.
Another issue is how many electrons can be fit in a state, which is fundamental when considering more bits per cell. NAND flash does not exist alone. There are systems that control it and manage the data. It becomes more difficult for these to do their jobs, particularly when designers increase the bit density per cell. It is obvious that 3-D configurations are coming.
Although the problems presented are serious, the general outlook was optimistic. After all, the industry has thrived on former engineering impossibilities.
