Applied Tackles Edge With Inflexion Polishing System

David Lammers, News Editor, and Laura Peters, Editor-in-Chief -- Semiconductor International, 5/7/2008 8:24:00 AM

Applied Materials Inc. (Santa Clara, Calif.) announced its entrance into the wafer edge cleaning sector, introducing the Inflexion system that performs edge polishing based on an abrasive tape approach.

Semiconductor companies and their equipment suppliers are paying more attention to the wafer’s edge, trying out various approaches to edge cleaning as the fast-moving liquids used in immersion lithography sweep residues out to the wafer’s edge.

At the Advanced Semiconductor Manufacturing Conference (ASMC) in Cambridge, Mass., Ronnie Porat of Applied Materials and colleagues at Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC, Hsinchu, Taiwan) presented a SEM-based methodology for root-cause analysis of wafer edge and bevel defects. “Immersion lithography increases edge defect issues because, as the immersion water hits the wafer edge wall, the resist and topcoat in contact with the silicon can crack, causing particles that remain in the water and redeposit on the wafer,” Porat said.

Paul Miller, global product manager of the Inflexion system, said existing dry and wet etch techniques are no longer adequate to clean wafers, particularly those with copper and low-k materials. Applied’s approach uses abrasive tape in a system that has up to three modules. Each chamber has three polishing points working simultaneously on a single wafer. The Inflexion system also includes an integrated Desica cleaning station, the same cleaning module used on Applied’s chemical mechanical polishing (CMP) systems.

The Inflexion system can have up to three cleaning chambers, each with three cleaning points using abrasive tape to polish the wafer edge.

Miller said Applied’s system has “a high degree of precision, an ability to control edge removal very precisely.” Several beta customers have used the system to gain significant yield advantages that he said more than justify the “insignificant” costs of running the system.

Dean Freeman, semiconductor manufacturing analyst at Gartner Inc. (Stamford, Conn.), said he estimates the edge cleaning market at $100-$120M in 2008, out of an overall cleaning equipment market of $1.7B. A high-volume megafab used to make memories, for example, might require 10-15 edge cleaning tools, he said. The market is growing as immersion lithography becomes more prevalent, Freeman said, noting that Gartner estimates that 74 immersion scanners will ship this year.

Freeman said the list of edge cleaning competitors is long, including Sosul Co. Ltd. (Yongin, South Korea), which Freeman said controls roughly one-third of the market with its plasma-based bevel etcher system. Late last year, Lam Research Corp. (Fremont, Calif.) introduced its Coronus edge-cleaning system, which combines plasma cleaning with a confinement technology that protects the die area.

Ebara Corp. (Haneda, Japan) has an edge-cleaning system on the market that also uses an abrasive tape as the cleaning agent. Accretech (Austin, Texas) has gained a toehold in the market at Semiconductor Manufacturing International Corp. (SMIC, Shanghai) with Accretech’s Habanero edge-cleaning system, which uses a super-heated gas. Novellus Systems Inc. (San Jose) and other companies offer cleaning solutions as well.

Throughput, consumables

Applied’s system may have slightly slower throughput than the incumbent wet clean tools, Freeman said. “Some fabs are looking strictly at cost, and they may be looking at the cost of consumables for the Applied system. Other leading-edge customers are looking positively at the selective clean capability of the Applied system, as well as the integrated clean capability. It depends on what the customer is looking for.”

Asked about the cost of the consumables, Applied spokesman Richard Lewington said for wafers impacted by multiple material residues, the Inflexion system's cost-per-wafer is “actually lower compared to other methods. They may need multiple wafer passes to remove different materials and they still won't match the Inflexion system's performance. Also, the Inflexion's polishing consumables have undergone dramatic cost reductions in the last year, and will drop further with volume.”

The spokesman noted that the integrated cleaning station cleans the entire wafer and will reduce the number of wafer moves within the fab, avoiding the problem of keeping dirty FOUPs separate from clean FOUPs.

At ASMC, participants from Applied advocated a SEM-based inspection approach, not because the defects of interest are so small, but because tilted SEMs can look directly at the apex of the wafer. By stage rotation, a good part of the top, bevel and apex can be imaged. Porat recommended using a large field-of-view SEM with dynamic focus to image edge and bevel defects. “Optical microscopes are very limited when it comes to bevel/edge inspection, and the EDX feature of SEMs is very useful for root cause analysis,” he said.

A number of wafer processes, such as etch, CMP and edge-bead cleaning can be used to improve yields by ~5-10%. Porat warned that edge/bevel inspection methodologies are fairly new and still under development. “It’s hard to say which edge defects will be a problem. So far, we don’t have enough data, so we are putting a lot of effort into generating the data that is needed so that it can be coordinated to actual wafer processing events,” he said.