Race Track Runs Circles Around Flash
Alexander E. Braun, Senior Editor -- Semiconductor International, 4/10/2008 8:49:00 AM
Race track stores data as a magnetic pattern on a nanowire. Pulses of spin-polarized electrical current induce the whole pattern, a train of ~10-100 domain walls, to shift or race along the nanowire track where data is read and written in under a nanosecond in either direction. The writing is done by a secondary nanowire with a special pattern placed near the primary one. Data on the primary nanowire can be changed by moving the pattern along the secondary one. There can be thousands of these nanowires around the chip’s edge, potentially allowing for 100× the storage capacity in the same space of today’s memory devices. Potential benefits include greater operating speeds, lower power requirements, and virtual indestructibility.
The magnetic nanowire arrays used for the new memory are produced using electron-beam (e-beam) and optical lithography to deposit a multilayer stack. The nanowires themselves are composed of a well-known nickel-iron magnetic alloy: permalloy. “The concept is completely different from a hard disk drive,” Parkin said. “The nanowire is the equivalent of the disk drive’s magnetic medium.” The nanowires used are ~200 nm, but the researchers also considered others in the 100-300 nm range. Although thicknesses considered ranged from 10 to 40 nm, the IBMers used nanowires 20 nm thick.
Occasionally, the term “paradigm shift” fits. Researchers have spent decades attempting to determine how to build devices with magnetic domain walls. The Almaden group has demonstrated a completely new, previously unavailable method for moving domain walls. This work is a genuine milestone because it is a proof-of-concept of the underlying technology needed to build an actual race track memory. Previously, they demonstrated that a single magnetic domain wall could be injected into a Permalloy nanowire and moved at relatively high velocities using current pulses. This is also a significant step toward 3-D devices.
“Now we’ve shown that we can inject not just one, but several domain walls and, most importantly, that with the same current pulse, we can move them in tandem along a magnetic nanowire at velocities up to 200 m/sec using nanosecond-long current pulses,” Parkin explained, adding that this a crucial milestone toward building a race track prototype. In an HDD, domain walls are created by applying magnetic fields and a mechanical object — a large disk platter spinning at high speed — rotates the magnetic bits. This is an inefficient way to store and retrieve information.
Now information can be moved without mechanical rotation, using current pulses to move the domain walls themselves. Before, the only way to move a domain wall without using mechanical means, such as the HDD, was with magnetic fields. However, it is impossible to move several domain walls along a magnetic nanowire using a magnetic field because to create neighboring domain walls, their symmetries must be opposite; that is, the first domain wall would consist of a boundary separating two magnetic regions where two side-by-side north poles point at each other. The next domain wall has two south poles side by side. Thus, if a magnetic field is applied, the north-north and south-south domain walls move in opposite directions. As the IBM group demonstrated, when a current is used, the two domain walls — the north-north and south-south — move in the same direction. This is a completely new result.
A race track memory prototype is next. It now becomes necessary to show that it is possible to build an integrated element for reading the race track’s domain walls. Presently, they can be read by simply measuring the resistance of the nanowire in which the domain walls are incorporated. When a domain wall is incorporated into a nanowire uniformly magnetized in one direction, its resistance is slightly lowered. Although this resistance change is satisfactory for research work, it is minimal for real-world applications, even though, as Parkin put it, “It’s more than adequate to produce lots of beautiful data confirming the concept!” What is needed now is an integrated device that can read domain walls with sufficient signal-to-noise to enable commercial applications.
The race track concept is completely different from flash memory’s. Flash is based on charge storage in a capacitance cell. It is made non-volatile by building a big wall to keep the charge from leaking out. To operate it, relatively high voltages and large magnetic fields are required; however, each of these cycles causes a certain amount of cell breakdown, limiting flash memory’s lifetime. Race track memory lacks wear or fatigue mechanisms; it is more robust.
Yet another difference is that like most conventional memories, flash uses a transistor — which acts like a switch — to access a particular memory element, and that element has one bit. While it is possible for flash to have one, two or even four bits per transistor, this increases cell wear. “We’re accessing many bits using a single transistor, and plan to put as many as 16 domain walls into a single nanowire,” Parkin said. “Unlike conventional silicon-based technologies like flash, we can store many, many bits per transistor to build a much denser and more reliable memory that, to boot, requires less power to operate.”