Intel Tackles EUV Mask Cleans
Aaron Hand, Executive Editor, Electronic Media -- Semiconductor International, 4/2/2008 10:24:00 AM
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EUV lithography is considered by many to be the most likely candidate for printing critical CMOS layers beyond the 32 nm node. Although EUV lithography brings with it a >10× wavelength reduction (and thereby a straightforward resolution gain), it also requires a new mask architecture because the EUV wavelength is absorbed by most optical materials. EUV masks, therefore (as well as the rest of the optics in the system), are reflective rather than refractive.
Liang’s talk yesterday focused in particular on the need to achieve zero “adders” (particles added by the cleaning process), which he noted is very difficult for mask cleaning. Showing a cross-section of a typical Intel EUV mask, he detailed the potential types of both non-cleanable hard defects and cleanable soft defects that are common within a technology that is ultimately requiring zero printable defects on a finished mask (Figure).
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| In trying to achieve zero printable defects on a finished EUV mask, cleaning processes must contend with pattern defects (1), which are non-cleanable hard defects, but could be repaired; residual multilayer defects (2), which are non-cleanable hard defects, but can be compensated for; and cleanable ‘soft’ defects (3) such as particulates and hydrocarbons that are <1 nm high. (Source: Intel) |
Although EUV mask cleaning uses only a subset of the chemistries needed to clean silicon wafers, it nonetheless brings its own set of challenges, including:
- Wafer cleaning can handle particle removal efficiency (PRE) of <100%, but that’s not the case for masks because yield is binary.
- Surface damage and film loss for EUV masks has become as critical as it is for silicon wafers.
- EUV masks, compared with 193 nm masks, introduce new materials, including a ruthenium cap and TaN absorber.
- EUV masks are highly sensitive to oxidation and contamination.
- Because no pellicle is possible, the masks will require frequent cleaning in the fab.
- It’s critical to achieve organic removal without oxidizing the ruthenium surface.
Liang showed that 100% particle removal from the entire 6 in. ruthenium/multilayer (Ru/ML) surface is possible, but it’s very difficult to achieve zero process adders. The study with DNP showed that the adder level depends on the type of surface and its particular adhesion level. Quartz surfaces used in 193 nm lithography, for example, are “immune” to adders because of their low adhesion, and antireflective chrome surfaces (also used for 193) have a low number of adders, with minimal imaging impact. But the same could not be said for EUV’s Ru/ML surface, which not only retains more adders, but those adders also have a bigger impact on imaging because they absorb the EUV light.
To make matters worse, because adders are organic, many adders are unremovable with additional scanning probe microscopy (SPM) chemistries. Alternatives, as Liang noted, include changing clean chemistries — ozonated water, for example, is effective for organic removal — and improving filtration to eliminate adders at the source.
As detailed in presentations following Liang’s, Pall Corp. (East Hills, N.Y.) is working on some promising filter improvements, and Sematech Albany has been exploring new methods for removing hard particles. In some further discussion of the use of ozonated deionized water (DIO3), Liang noted the major concern there is damage to the mask surface by corrosion. After 20 minutes of cleaning, the surface gets destroyed. So while DIO3 is very attractive, very clean and very easy to handle, Liang said, surface destruction remains an issue.
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