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Improving Electrical Performance Using SACVD Oxide Films

An ozone/TEOS-based sub-atmospheric CVD process demonstrates improved drive current, junction leakage and superior gap fill for aspect ratios >8:1 for STI and >6:1 for PMD. Use in a locally strained channel device is also demonstrated.

Cary Ching, Harry Whitesell and Shankar Venkataraman, Applied Materials Inc., Santa Clara, Calif. -- Semiconductor International, 4/1/2008

High-density plasma chemical vapor deposition (HDP-CVD) is currently the most commonly used gap-fill technology for 65 nm shallow trench isolation (STI) and pre-metal dielectric (PMD) because of quality gap-fill performance, ease of polishing and superior wet etch rate.1,2 However, as geometries shrink to 45 nm and beyond, gap fill becomes increasingly challenging for HDP-CVD, especially in DRAM and NAND flash structures. For example, state-of-the-art logic and memory technology nodes require STI trenches with aspect ratios <8:1 to be filled. In addition, the issue of compressive stress and the degradation of NMOS mobility caused by films deposited via HDP technology could be a significant process disadvantage.

A high-aspect-ratio process (HARP) oxide film using an ozone/tetra-ethyl-ortho-silicate (O3/TEOS)-based sub-atmospheric CVD process has shown superior void-free gap fill for STI and PMD applications.3 In addition, HARP films are tensile in nature (the as-deposited HARP films are nearly 200 MPa tensile), and can induce stress in the channel and enhance carrier mobility.1,2 Furthermore, because HARP films do not use any plasma, risk of damage to underlying films is eliminated.

The HARP process

The HARP STI film is created in three separate process steps that are consecutively deposited as one integrated recipe. Step 1 requires a very high O3:TEOS ratio and ramped TEOS flow setpoints to produce a 600-Å-thick, highly conformal liner layer. Step 2 also requires a very high O3:TEOS ratio and low TEOS flow setpoints to deposit a 1400 Å film to complete the gap fill for the smallest trenches. Step 3 requires a lower O3:TEOS ratio and higher TEOS flow to deposit a capping layer with higher deposition rate and throughput. The deposition temperature is 540°C, and the film is deposited at a chamber pressure of 600 Torr. After deposition, the HARP STI film requires a densification anneal in a furnace (typically between 900°C and 1050°C for 30 min). This anneal reduces the wet etch rate, drives out moisture and improves the density of the film.

The HARP PMD film consists of two separate process steps that are consecutively deposited as one integrated recipe. Step 1 requires a very high O3:TEOS ratio and ramped TEOS flow setpoints to produce a 800-Å-thick, highly conformal film that fills the advanced PMD gaps. Step 2 requires a lower O3:TEOS ratio and higher TEOS flow to deposit a capping layer with higher deposition rate and throughput. The deposition temperature is 430°C, and the film is deposited at a chamber pressure of 600 Torr. Because of the low PMD thermal budget for advanced logic devices, the HARP PMD is not annealed after deposition.

The HARP films were fully characterized. Film shrinkage was calculated after furnace anneal (1050°C for 30 min); wet etch rate ratio (WERR) was measured after etching in 100:1 dilute hydrofluoric acid (DHF) solution; film stress and stress hysteresis were measured; Fourier transform infrared (FTIR) spectra was collected on HARP films as-deposited and over different time periods. HARP fill capability was tested and demonstrated. Finally, a comparison between HARP and HDP-CVD on device wafer performance was conducted.

HARP STI film characterization

A complete film characterization of the HARP STI films is presented below. The data includes film shrinkage, WERR, film stress and FTIR curves.

Film shrinkage and WERR — A film with low shrinkage and high WERR will be more robust during subsequent clean and planarization steps. Table 1 summarizes HARP STI film shrinkage and WERR before and after anneal for each step. Although shrinkage and as-deposited WERR vary with deposition step, after anneal, the WERR of steps 1, 2 and 3 are very similar. This post-anneal WERR is lower than HDP-CVD films.

Film stress — The HARP STI film absorbs moisture and releases stress over time. Figure 1 shows the stress relaxation for the non-annealed HARP STI film as moisture is absorbed. After 24 hours, the stress relaxes from ~210 MPa to ~50 MPa; after 72 hours, the stress is ~30 MPa.

1. As moisture is absorbed, stress relaxes in the non-annealed HARP STI film from ~210 MPa to ~50 MPa after 24 hours and to ~30 MPa after 72 hours.

The change in moisture content is shown in the FTIR curves (Fig. 2). The curves taken at 4 hours and 3 days show evidence of moisture absorption at ~3300 wavenumber. However, after a 1050°C anneal, the moisture was driven out of the film. The FTIR trace of the film post anneal shows no evidence of moisture at ~3300 wavenumber.

2. Stress hysteresis of HARP STI film is shown. Temperature ramp rate is 5°C/min.; total cycle time was eight hours.

Stress hysteresis — Stress hysteresis is shown in Figure 3 for HARP STI steps 2 and 3 (Step 1 is too thin to accurately measure stress). The wafer was heated to 900°C. Two peaks are found at 275°C and 725°C; maximum stress occurs at ~725°C, where the oxide film restructures. The final stress as the film cools is ~200 MPa compressive in both cases, similar to a typical HDP-CVD film.

3. FTIR spectra of HARP STI films showing correlation between moisture content and film stress.

HARP PMD film characterization

A similar film characterization of the HARP PMD films has been conducted and is presented below.

WERRTable 2 shows that the WERR of the HARP PMD film is ~11:1 when compared with thermal oxide. This WERR is higher than the HARP STI film because of the lower deposition temperature of the HARP PMD film.

Film stress — Similar to the HARP STI film, the HARP PMD film is highly tensile (>300 MPa) as deposited, and relaxes to <100 MPa over time as moisture is absorbed (Fig. 4).

4. HARP PMD film is highly tensile (<300 MPa) as-deposited and relaxes to <100 MPa over time as moisture is absorbed.

Stress hysteresis — Stress hysteresis for the HARP PMD film is shown in Figure 5. The wafer was only heated to 400°C because that is the PMD thermal budget limit for advanced logic devices. The stress peak is found at ~200°C. As the film cools, the final stress returns to the as-deposited level. Note that in this case, unlike the annealed STI film, the PMD film is not stable at this stage and will release stress over time as atmospheric moisture is absorbed. However, because subsequent metallization is a high-temperature process, the PMD film will release absorbed moisture and the stress will return to the as-deposited level.

5. Stress hysteresis of HARP PMD film is shown. Temperature ramp rate is 5°C/min.; total cycle time was eight hours.

HARP film-step coverage, gap-fill capability

Seamless, void-free gap fill at aspect ratios <8:1 have been produced by the HARP STI film. An example of this gap-fill capability is shown in Figure 6. In addition, gap fill for 24 nm gaps at an aspect ratio as high as 12:1 has been demonstrated.3

6. HARP STI gap-fill capability before and after deposition. Test structures were provided from Maydan Technology Center.

Step coverage of the HARP STI film is >95% (Fig. 7). Because of this excellent step coverage, the HARP STI film can also be used for spacer and liner applications, where step coverage is key. Without high step coverage performance, sidewall deposition thickness will vary between feature sizes and between isolated and dense features. One example is stress memorization, where a thin HARP STI film is deposited in between the source/drain (S/D) implant and rapid thermal anneal process steps for implant activation. Annealing this highly tensile thin HARP film induces stress in the gate/channel region, leading to improved electrical performance.

7. Greater than 95% step coverage for thin HARP STI film in (left) isolated and (right) dense arrays.

Similar gap-fill performance was achieved for PMD applications, where aspect ratios are less severe than STI (typically 6:1).

Comparison between HARP, HDP-CVD

A comparison was performed by systemically replacing HDP-CVD with HARP for both STI and PMD in a 65 nm test device with standard substrate (001) and channel (110) orientation. The electrical performance is reported vs. the HDP-CVD baseline. The post-anneal HARP STI film used in this study is ~30% less compressive than the baseline HDP-CVD film. The wet etch rate is slightly slower (indicating a higher-density film) vs. HDP-CVD, making HARP highly compatible with CMP. The HARP PMD film stress (as-deposited) is tensile vs. compressive HDP-CVD baseline.

8. PMOS Ion-Ioff data shows an 18% gain when HARP was used for STI and PMD fill. (Source: J.S. Byun, Cypress Semiconductor)

Replacing HDP-CVD for STI fill with HARP STI provided 10% Ion gain vs. HDP-CVD control. Substituting HARP PMD provided 15% Ion gain. When HARP was used for both STI and PMD, a gain of 18% was achieved (Fig. 8). Junction leakage was improved for all splits with HARP vs. HDP-CVD baseline (Fig. 9).

9. Improved cell junction leakage for HARP splits. (Source: J.S. Byun, Cypress Semiconductor)

Conclusions

In summary, the HARP film has been studied for multiple applications, including STI fill, PMD fill and liner films. Film properties have been characterized. Excellent gap fill for aspect ratios >8:1 for STI and >6:1 for PMD have been demonstrated. Furthermore, improved drive current and junction leakage vs. HDP-CVD has been shown when used for STI and PMD fill. Finally, the benefits of a locally strained channel device have been demonstrated when the HARP film is used. HARP film satisfies the needs for STI and PMD fill for 45 nm and beyond.

Author Information
Cary Ching is a product manager for SACVD products in Applied Materials' Gapfill Division. He has a B.S. in materials science from MIT and an M.S. in materials engineering from Rensselaer Polytechnic Institute (Troy, N.Y.).
Harry Whitesell was formerly a key account technologist for Applied Materials' GapFill Division. He is now a key account technologist for Applied's Solar Business Group. He has a Ph.D. in the philosophy of materials engineering from Auburn University (Auburn, Ala.).
Nitin Ingle is director of technology in the SACVD/Gapfill Division. He is responsible for thermal CVD dielectric deposition product portfolio at Applied Materials. He has a B.S. in chemical engineering from the Indian Institute of Technology (Bombay, India) and a Ph.D. in chemical engineering from the State University of New York.


References
1. Y.W. Teh, J. Sudijono, C. Ching, S. Venkataraman and A. Jain, "A Novel High-Stress PMD Film to Improve Device Performance for Sub-65 nm CMOS Manufacturing," MRS, 2006.
2. H. Liu et al., "The Application of HARP for PMD Gap Fill for 65 nm Technology Node and Below," Advanced Metallization Conf., 2006, p. 623.
3. A. Tilke et al., "STI Gap-Fill Technology With High Aspect Ratio Process for 45 nm CMOS and Beyond," ASMC 2006.

Acknowledgments
The authors would like to thank J.S. Byun at Cypress Semiconductor for acquiring data on device wafers. A version of this paper was originally published in the 2007 proceedings of the International Symposium on Semiconductor Manufacturing (ISSM).

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