NGF Plan Seeks Reduced First Wafer Delay
David Lammers, News Editor -- Semiconductor International, 10/31/2007 8:10:00 AM
While the 450 mm wafer controversy has grabbed headlines, much of the industry’s here-and-now attention is on the initiatives to reduce cycle times and improve equipment productivity within the 300mmPrime and Next Generation Factory (NGF) programs.
At last week’s International Sematech Manufacturing Initiative (ISMI) symposium in Austin, Texas, ISMI managers published a 19-point Next Generation Factory plan, with many of the changes starting in 300 mm fabs but expected to carry over to the 450 mm generation, whenever it arrives.
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| ISMI's Brad Van Eck |
The ISMI members plan to study the optimum mix of single wafer and mini-batch (vs. batch) processing tools, as well as equipment designed for flexible capacity increments.
Asked about smaller lot sizes, Van Eck said the ultimate goal is to have multiple lots within a single 25-wafer front-opening universal pod (FOUP). A company doing prototyping, for example, might run six wafer lots to reduce cycle time. Theoretically, a lot could be a single wafer within a FOUP, or any number between one and 25 for that matter.
A 50% cycle time delay is another goal. If a two-month cycle time is common in today’s fabs, with rush lots requiring three to four weeks, Van Eck said, “We want a couple of weeks to be normal.”
The NGF program requires consensus-building and prioritization, both among the 16 devicemakers within ISMI and between the chip manufacturers and tool vendors. Also, the NGF program involves coordination with SEMI (San Jose) to identify guidelines and SEMI standards, he said.
Small lot sizes
More companies are using small lots to produce a wider variety of products. One challenge facing ISMI is how to meet the needs of both the high-volume/low-mix and high-volume/high-mix devicemakers. The high-mix model has a larger percentage of wafer starts on shorter, older technology flows, compared with leading-edge low-mix flows.
However, smaller lots require an order of magnitude more information passing between the carrier and tool. If the FOUP holds wafers requiring several different recipes, that presents a huge data transport challenge, with fatter data pipes, more robust controllers, and a new generation of control software, Van Eck said.
To that end, the 19-point NGF program includes several control-related calls to action. Controls should support continuous processing of material; wafer-level instructions at any time before processing; single point of control for factory system command and control, as well as equipment to provide data to external monitors; and improvements to the flexibility of carrier-to-slot integrity.
In the carrier and automated material handling system (AMHS) arena, the plan calls for carriers designed for efficient purging, with standardized purge locations on the 25-wafer carriers. The material handling system designs should assume infrequent, “anomaly manual” handling, and they should be designed to support automated reticle transport.
In equipment design, the program calls for study of a common platform, with standardized interfaces between the equipment mainframe and process chambers. Van Eck said that is just a proposal, with "nothing decided at this point." Another project calls for standardized locations for low-cost buffers on tools beyond the load ports.
Predictive maintenance — which can sharply improve a fab’s ability to avoid long fab-wide maintenance shutdowns — is an initiative that is well underway. The NGF program also calls for the ability to perform equipment maintenance and operation in parallel. Tools should have a “Smart Idle” mode, and the ISMI action plan calls for facility adaptor plates.
