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A Semiconductor Milestone

Gary Smith, President, Gary Smith EDA, Santa Clara, Calif., www.garysmitheda.com -- Semiconductor International, 11/1/2007

This year, the semiconductor industry reached a milestone for system-on-a-chip (SoC) design, but I don't think we'll be seeing many celebrations. For in 2007, the cost of developing the embedded software for an SoC exceeded the cost of designing it.

Even though we have been going through this shift since 2001, the industry is just beginning to understand its impact. The first sign that something was different came in 2001 when we started seeing SoC projects fail even though the silicon implementation of the system was fully functional to the specification. What wasn't working was the software. That was when we discovered that we needed to take into account the programming of multi-core SoCs if we wanted a successful project. That was followed a few years later by the MP3 Christmas disaster. ASSP vendors had found that, in the new world of SoCs, they had to supply the IC with a reference design, sometimes including the PCB implementation of the function. This enabled a multitude of “screwdriver” factories to get into the business of manufacturing some fairly sophisticated electronics.

Unfortunately, there were two Christmas rushes that season. The first was to buy the new inexpensive MP3 players, and the second was to return those same MP3 players. It seems that “screwdriver” factories didn't have the level of expertise to develop the embedded software to reliably make the MP3 players work. All of a sudden, the SoC vendors discovered that if they wanted to sell their ICs, they needed to supply the embedded software along with the silicon.

Two years ago, it was noted that the semiconductor vendors in Silicon Valley were hiring more embedded software engineers than they were IC designers. This accelerated with 2007's introduction of very large block SoC design. A very large block is defined as an IP core in excess of one million gates. As we move up to higher and higher levels of integration, we need to increase the size of our reusable cores to continue increasing the design efficiency of our engineers. In the year 2000, you needed 18 engineers to design one million gates. With the introduction of very large blocks, you only need 1.7 engineers. The use of very large blocks means you are embedding full platforms into the SoC design. Each of these platforms comes with its own processor(s), bus structure, and peripherals that are nowadays also often programmable. In essence, what we have done is raised the efficiency of the IC designers by dramatically increasing the load on the embedded software engineers.

Unfortunately, the embedded software engineers did not come equipped for the task. The world of software was developed based on the Von Neumann computing model. This is a sequential model that uses a sequential language C, which is basically one processing element doing serial computations. To get around the IC power crisis, the semiconductor world has moved to concurrent, multi-core, multi-processing architecture at lower silicon frequencies. When you look at today's SoCs with multiple platforms, each with multiple processors, you see the problem. In essence, we have asked our software engineers to hunt lions with a sharp stick.

That means we need to develop a concurrent software infrastructure, possibly including a new language, to replace C. As I said, this has caught the semiconductor industry by surprise. The real bad news is that it has caught the software industry by surprise as well. We are not expecting to build the new software development infrastructure in the near future (Figure). It looks like the earliest we can expect to see a significant improvement will be in 2013. So hang onto your seats, the next six years are going to be a rough ride.

The earliest the semiconductor industry can hope to see an improvement in software development for SoC is 2012. (Source: Gary Smith EDA)
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