New Focus on Productivity, Lean Manufacturing

Despite an urgent cry from some for a transition to 450 mm wafers, there's plenty that can be done to delay that need by improving tool and fab productivity. That's the message from SEMI (San Jose) and most equipment suppliers.

"As industry dynamics change, it is essential in the next generation that technology be very focused and very targeted," said Stan Myers, president of SEMI, speaking at a press conference at SEMICON West 2007 . "With limited resources, it is important for our industry to prioritize approaches to maximize productivity in the fab." Current initiatives, which are collectively referred to as 300mmPrime, aim to specify a next-generation fab architecture that will enable fab owners to maximize the return on investment (ROI) on their R&D. "Only after getting the gains from these endeavors does it really make sense, at least in our opinion, to consider a wafer size transition," Myers said. "The industry may eventually transition to another substrate size in the future, perhaps we think in the year 2020 or maybe even later." Myers said there's a 50-50 chance that the new substrate could be 450 mm silicon or some other material. "Right now and for the foreseeable future, there are many pressing issues and avenues of productivity investment other than wafer size change. Further, there does not appear to be a consensus among chipmakers on the need to migrate the larger wafers very quickly. We are concerned that the motivation to push the transition could be predicated on some disputable economic modeling."

Kevin Fairbairn, president and CEO of Intevac (Santa Clara, Calif.), said that fab and tool architectures have not kept up. "Back in the early '90s, when people built fabs, they were either 20,000 or 40,000 wafers/month type sizes. Those days, people were buying two and three chambered cluster tools. Today, fabs are 100,000 wafer starts per month and really the configurations haven't changed significantly. As a result, there are a lot more tools in these fabs." Intevac recently introduced a new etch system that employs a design that is said to enable "lean" manufacturing, a concept pioneered by Toyota (Figure ). "There are about 300 process steps in a typical CMOS wafer fab. The process times vary from 30 seconds to maybe as long as six minutes. If you took an average of three minutes, and you took those 300 steps and multiplied by three minutes, it's about 15 hours. So that's what it should take to make a semiconductor wafer. In the industry, the cycle time is much, much higher than that. It ranges from eight days to four weeks, depending on the company," Fairbairn said.

Ed Grady, president of Brooks Automation (Chelmsford, Mass.), noted that all of the process steps are getting more difficult, and it's requiring more tools per fab. "When I joined Brooks in 2003, we saw one of the big issues as wafer transition, and we started down a path of what do you do to change the dynamics in a fab from the old layouts of fabs that are not very productive and efficient in a high product mix, short product lifecycle environment. If you go back 10–15 years where you could run a DRAM fab and do the same chip for a whole generation and just completely run out your capital investment, that was one set of criteria," Grady said. "Today, the product lifecycles are shorter, which means if you make an investment in a 300 mm fab, you have to be able to change products basically with consumer demand or as new products come out. 300mmPrime is addressing these issues from an automation perspective, but what do you do differently at 300 mm to make fabs more efficient? We really believe 300mmPrime has a place to extend and have an impact on how rapidly the semiconductor tool manufacturers have to invest in a new set of technology, which then impacts their profitability and ability to invest in those over a longer period of time."

Intevac’s ‘Lean Etch’ system eliminates the central handler, and is available in three or six chamber designs. The company’s president, Kevin Fairbairn, said the tool is designed to address the problems of cluster tools, which he said are wasteful of space within the fab, prone to throughput bottlenecks, must be shut down during maintenance, and are hard to service because of poor access to the process chambers and wafer-handling platform.

Fairbairn said that the cluster tool concept is outdated. "In the footprint where we have six chambers, that's a very similar footprint to a three or four chamber conventional cluster tool. We've effectively, for long process times where the number of process chambers determines the throughput, upped the throughput by 50% over what's out there today," he said. "We didn't set out to design a very high-throughput mainframe. What we set out to do was one which eliminated any bottlenecks, any wasted time, and the result was we had a high-throughput system."

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