Bulk or SOI? AMD Considering Its Options

David Lammers, News Editor -- Semiconductor International, 7/31/2007 12:30:00 PM

Advanced Micro Devices (AMD, Sunnyvale, Calif.) is still mulling whether to use silicon on insulator (SOI) or bulk silicon technology for its future high-end and mobile products.

“This is in the exploratory phase, and AMD has not made any statements about when it would make a decision to produce next-generation processors in bulk or SOI,” a spokesman said, adding that AMD technologists are asking questions that “are not answered yet, so we are leaving the question open as they look at the issues.”

During a July 26 meeting, AMD executives described the company’s technology and product roadmaps. Doug Grose, senior vice president of manufacturing and supply chain management, said that AMD is “evaluating the mix” of SOI and bulk technologies for 2009 and beyond.

Much is riding on AMD’s eventual decision. AMD has based its microprocessors on SOI wafers for the 130, 90 and 65 nm generations, leveraging its technology development relationship with IBM Corp. Any major move away from SOI would have major implications for three of AMD’s closest partners: Chartered Semiconductor Manufacturing Ltd. (Singapore), IBM (Armonk, N.Y.), and Soitec (Bernin, France).

Chartered recently reported a quarterly financial loss, and its CEO blamed slow ramps of computer-use 65 nm products. Soitec, the major supplier of SOI wafers, recently reported its first-quarter sales dropped by 20% compared with the year-earlier period, with AMD’s woes and currency changes as the major challenges. It is building a new SOI production facility in Singapore that would depend, in part, on AMD continuing to buy SOI wafers in high volumes.

IBM has been touting SOI as a means of reducing junction capacitance, in contrast with Intel and Texas Instruments, which have shied away from SOI for cost and design complexity reasons. Even Freescale Semiconductor has a stake, with its high-end networking chips committed to SOI.

If AMD decides to keep part of its microprocessor product line in SOI and part in bulk, it would increase its own design complexity and could limit its ability to use microprocessor cores with the graphic processors it acquired as part of the ATI decision. Two separate processor design groups — one in SOI and another in bulk — would hurt AMD’s design flexibility and cost structure, one source said, asking to remain unidentified.

Beginning with 45 nm technology, Grose said 2009 is when two new processor cores would be used in combination with graphics cores to create designs in the Fusion product line.

The AMD spokesman said that AMD’s Xilleon and Imageon graphic product lines are created on bulk CMOS today, and include processor cores that account for ~20% of the total transistor count. Future designs in the Fusion line also could include processor cores that would account for only ~20% of the transistor count, arguing that “incrementally, it’s not that much of a design change if AMD chooses to create the new core on bulk. Again, this is in the exploratory phase, and AMD has not made any statements about when it would make a decision to produce next-generation processors in bulk or SOI.”

Last week, AMD vice president and chief technology officer Phil Hester described a modular “Lego-like” approach that would use cores still under development to address two distinct markets: the high-performance silicon used in servers, desktops and performance notebooks, which would use a processor core named Bulldozer, and low-power products aimed at smart phones and other mobile systems, based on a core named Bobcat.

For the Fusion line of products, the processor cores would be combined with graphics processors (GPUs) being developed by engineers who joined AMD following the 2006 acquisition of ATI. “Some critics have suggested that our strategy of mixing the ratio of CPUs and GPUs is flawed because these products would be difficult to code. Nothing could be further from the truth,” Hester said, adding that “no way on Earth do the discrete graphics products go away.”

The Bulldozer core, expected to debut in 2009 beginning with 45 nm design rules, would have “a 1.3× performance-per-watt improvement on top of” the processor cores used in the Barcelona quad-core product coming to the server market this quarter, Hester said. The Bulldozer core is expected “to move lots of data, for both client and server workloads.”

Analysts have been speculating for weeks that AMD would rely increasingly on Taiwan Semiconductor Manufacturing Corp. (TSMC, Hsinchu, Taiwan) to make some of its future products, beyond the chipsets and GPUs made at TSMC now.

Thus far, its server and desktop products have been manufactured on an SOI process at AMD’s Dresden, Germany, fabs, with 65 nm SOI foundry production in the early stages at Chartered.

Moving away from SOI would be a major shift. The AMD Opteron CPUs, to date, have been heavily optimized, with hand-crafted circuits in the critical path to wring out the highest performance, said Nathan Brookwood, principal analyst at Insight 64 and a close student of AMD’s roadmaps.

ATI, by contrast, has created GPUs as synthesizable cores using bulk silicon, ideal for porting from process to process. Theoretically, those custom circuits would make it more difficult for AMD to move its SOI-based CPU cores to a bulk process.

“Somebody has to change,” Brookwood said, noting, “ATI makes synthesizable cores with not much customization, while AMD has all kinds of customization. That says it would be much easier for ATI to move to SOI than it would be for AMD to move to bulk.”