Takumi Adds Automated Hot Spot Correction to DFM Toolset

Paula Doe, SEMI, San Jose -- Semiconductor International, 6/29/2007

Takumi Technology Corp. (Sunnyvale, Calif.) says its software will not only find and prioritize layout hot spots, but will also automatically fix them by adjusting the design. Different versions of the optimization software are targeted at modifying cell libraries for yield before design starts (at critical layers) and fixing defects found after optical proximity correction (OPC) and optical rule check (interconnect layers). Renesas Technology Corp. (San Jose) is using the tool in production to refine its 65 nm cell libraries. Takumi says Toshiba (Tokyo) is also using it in production to fix hot spots at the interconnect level. Though a number of other tools detect and prioritize hot spots, most of these defects still have to be fixed manually.

Takumi Enhance software uses a fab’s yield loss and failure rate data to locate potential defects in the critical layers of Metal 1; polysilicon and diffusion within a cell in the library; prioritizes them by how likely the defect is to cause a failure (in ppb); figures the cost of fixing each problem (in ppb). Next, the software then manipulates the design layout in the whole cell to get the lowest overall failure rate, making the trade-offs between competing fixes and moving all the sections impacted by each change. Efficient linear programming algorithms solve the very large matrix problem on distributed Linux servers, according to marketing vice president Tom Wong, cleaning up a 65 nm 500 cell library in about 2.5 hours with eight CPUs. The fab can then send the cleaned up cell library or IP block to the designers, limiting the problems that will show up later — and without the design side ever seeing the fab data.

Earlier work with Toshiba reported reducing interconnect layer defects at the full chip level down from more than 40,000 to 40 in under 12 hours on a single processor. Takumi recently reported data from a major IDM at Photomask Japan showing a case where the software fixed 12% of the hotspots to get a 30% reduction in failure rate.

The increasing complexity of pushing optical lithography to finer geometries means many more steps to link design to manufacturing process information.

The equations for yield loss and failure rate are based on specific fab results, and the rules can be updated overnight as the process matures. “It shows the fab where the yield problems that matter most are,” Wong said. “Some customers are experimenting with using it for process tuning.”

Though Takumi is headquartered in California, it has offices and design centers in the Netherlands and Japan. The company is funded by Concept Ventures (a U.S.-based VC) and IT-FARM (a Japan-based VC), as well as several corporate investors.

Takumi’s physical layout optimization software is one of the new developments highlighted at this year’s Technology Innovation Showcase. Get a full listing of the Technology Innovation Showcase winners, and register online for SEMICON West 2007, held July 16-20, at the Moscone Center in San Francisco.