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Making SWNTs Nanoelectronics

Ahmed Busnaina, NSF Nanoscale Science and Engineering Center for High-rate Nanomanufacturing and the NSF Center for Microcontamination Control, Northeastern University, Boston, www.nsec.neu.edu -- Semiconductor International, 6/1/2007

Recent developments in nanotechnology have generated much interest in shrinking the size of the memory storage element in a memory device, with an increase in the device storage density capacity per unit area. The International Technology Roadmap for Semiconductors (ITRS) projects that CMOS will run out of steam by 2015. To overcome this difficulty, various methods of operation (classical as well as quantum) have been proposed and studied, such as SRAM, DRAM, ZRAM, FRAMs, flash, quantum dots, resonant tunneling devices, phase-change memory devices, single-electron transistors, magnetoresistive memory devices, molecular electronic switching devices, polymer-based devices and carbon nanotube nanoelectromechanical systems (NEMS) switches.

Single-wall carbon nanotubes (SWNTs) are finding their way into new generations of nanoelectronics. They are being considered and explored as transistors, interconnects and switches for non-volatile memory applications. Presently, the manufacturing of carbon nanotube memory devices (NRAM) depends on a top-down fabrication technique. For example, a film consisting of a monolayer of SWNTs is deposited (spun) and patterned to make the columns and rows needed to build the NRAM device. The 1-2 nm thick patterned SWNT fabric can be interconnected with additional standard semiconductor CMOS circuitry above or below. The device requires metallic nanotubes, but the existence of semiconducting nanotubes does not appear to affect the switch.

1. Template-directed assembly of an array of SWNT nanoscale wires that are 80 nm wide and 100,000 nm long in a short time (30-90 sec) and over a large area (>2.25 cm2). (Source: NSF Center for High-rate Nanomanufacturing)

Another technique being explored is growing SWNTs on the wafer, although the high temperature required for SWNT synthesis poses a major challenge. The best alternative so far is bottom-up directed self-assembly that could be used to assemble nanoelements into uniform or non-uniform structures. This assembly directs the nanotubes (often from a solution) to where they are supposed to be connected (Figs. 1 and 2 ). They could serve as a transistor, switch element or interconnect. This can be accomplished using electrophoresis, dielectrophoresis or chemical functionalization assembly, provided that it is done at a high rate and over a large area. The assembly could be assisted by a template to guide the assembly and then transfer from the template to the wafer. The use of templates with nanoscale features enables 2-D and 3-D assembly of nanoelements (nanotubes, nanoparticles, etc.) and their transfer to other substrates in a predetermined pattern. SWNTs and nanoparticles could also be assembled without using a template by simply using the circuit to guide the assembly. This allows the assembly to directly occur on the wafer (on the patterned circuit). Although this approach is still in the early development stages, it is very promising because it is fast, occurs at room temperatures, and does not require additional fabrication steps.

2. Template-less directed assembly of SWNT between two electrodes for NEMS or other applications. (Source: NSF Center for High-rate Nanomanufacturing)

However, a great deal of R&D is needed to enable high-rate/high-volume nanomanufacturing.

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