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Inverse Lithography Makes New Inroads in RET

By Aaron Hand, Executive Editor, Electronic Media -- Semiconductor International, 5/1/2007

When Luminescent Technologies Inc. (Palo Alto, Calif.) first began showing the semiconductor world its unique lithography-enhancement products at the 2005 Photomask Technology conference, there were several questions asked by the audience with regard to manufacturability. At the time, about a year and a half ago, the startup was touting its Inverse Lithography Technology (ILT) as a breakthrough replacement for resolution enhancement technique (RET) software, presenting results for the 65 nm node.¹ Although they presented several papers with various partners such as SMIC, UMC, Xilinx and Cypress , not everybody seemed sold on the idea.

This time, making its latest splash at the Advanced Lithography conference at the end of February, the company unveiled new results of its most aggressive ILT deployment — this time on complex 45 and 32 nm critical layers. Not only is the technology outperforming the capabilities of state-of-the-art optical proximity correction (OPC), but the company has spent the past year and a half perfecting its approach and answering questions. The idea was to first prove that ILT could solve a problem, noted Linyong (Leo) Pang, vice president of product marketing and business development at Luminescent. Then the company could get to work showing how to solve the mask manufacturability issue, he added.

Unlike typical RET software, which is iterative in nature, ILT starts directly with the desired IC pattern on the wafer, then uses mathematical inversion to deliver a manufacturable mask pattern that generates the maximum design fidelity with the broadest possible process window.

The latest data, which come from the evaluation of ILT by various foundries and memory and logic IDMs, show new capabilities in processing areas of critical layers that have eluded conventional OPC. They also reveal substantial depth-of-focus (DoF) improvements and new cost-of-ownership (CoO) advantages. Evaluation tools are installed at five semiconductor manufacturing sites, and two full-chip Luminizers (the latest manifestation of Luminescent's technology) have been shipped — for both 32 and 45 nm development efforts.

ILT can improve pattern fidelity, process window and resolution over OPC. (Source: Luminescent Technologies)

Besides standard reports of superior pattern fidelity and a broader process window, ILT has demonstrated the ability to solve line-end shortening problems in the poly and diffusion layers at 45 nm. At this node, manufacturers are exploring the possibility of extending their dry steppers and delaying the move to immersion. Although conventional OPC has not been able to solve the line-end shortening problem, ILT is able to print 45 nm poly and diffusion layers with an adequate process window.

ILT has also demonstrated a DoF improvement of at least 100 nm (>30%) over conventional solutions on one customer's 45 nm memory contact layers. The improved DoF expands the process margin.

Users are also seeing benefits in mask-write speed metrics and mask-inspection validation, as well as CoO. Beyond the cost benefit of eliminating the need for script writers, accelerated turnaround time is also improving CoO.

At Advanced Lithography, Pang discussed several examples of customers working on various designs with ILT. In one case, printing 45 nm contact layers, a chipmaker was able to move from an exposure tool with a 0.92 numerical aperture (NA) and multipole illumination to a 0.83 NA machine using annular illumination. In this case, DoF also improved from 296 to 408 nm.

Another manufacturer was working on printing 45 and 32 nm random contacts. With ILT, they were able to resolve both the dense contacts and isolated contacts in that tape-out. According to Pang, the chipmaker used three vendors, and Luminescent's solution was the only one that could resolve the isolated contacts.

In yet another case, a customer printed 45 nm critical layers without immersion lithography. There was no bridging or line-end shortening, Pang said, and ILT offered a much bigger process window. DoF was improved to 470 nm on poly line CD.

The list of achievements goes on, but a key claim for ILT is its ability to extend the life of current exposure tools and perhaps delay the introduction of immersion lithography. Process development is reaching a point where Luminescent's technology is hitting its sweet spot. As Pang points out, 90% of the correction done with OPC is pretty good. But ILT gets at the 10% that could give chipmakers a much needed expansion of their process windows.


Reference
  1. A. Hand, “New Enhancement Platform Starts at the Wafer ,” Semiconductor International, November 2005, Vol. 28, No. 12, p. 30.
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