Intel and IBM Commit to High-k, Metal Gates
Peter Singer, Editor-in-Chief -- Semiconductor International, 1/29/2007
In a surprise announcement described as the “biggest change to computer chips in 40 years,” Intel said it has committed to putting hafnium-based high-k gate dielectrics and metal gate electrodes into production for the 45 nm generation. Intel’s announcement was quickly followed by a similar one from IBM. The two advantages of a high-k gate material over the silicon dielectric and silicon oxynitrides now used are reduced gate leakage and increased drive current. It also enables future scaling, since conventional dielectrics are already critically thin, measuring only ~5 atoms thick. It’s estimated that almost half of a chip’s power consumption is due to current leakage through this thin dielectric.
Texas Instruments announced last June that it would be putting metal gates into production for the 45 nm node, but at the time said that continued use of proven silicon nitrided dielectrics would deliver the necessary power consumption control without having to simultaneously move to new, more complex high-k materials.
Intel said it remains on track for 45 nm production in the second half of this year. The announcement is surprising because the latest International Technology Roadmap for Semiconductors (ITRS), which includes input from Intel and IBM, forecasts a delay of two years for high-k and metal gates, pushing their introduction from 2008 to 2010.
Several different types of high-k materials have been evaluated for use as an alternative gate dielectric, but most research has focused on hafnium-based solutions, and that is what Intel and IBM have said they will be using. Problems such as Fermi-level pinning and adhesion have so far delayed the introduction of high-k gate dielectrics, but Intel and IBM say they have solved those problems.
Presently, most electrodes are highly doped polysilicon, but they are not compatible with high-k dielectrics. Intel has previously announced that researchers have demonstrated dramatic performance gains using gate electrodes with work functions tuned specifically for the n-channel and p-channel transistors used in CMOS chips. The company has remained highly secretive about the exact composition of those metals, however, as well as when they might be employed in production, saying only it will use “a combination of different metal materials for the transistor gate electrodes.” No details were released on how the metal gates would be fabricated: straight deposition of the metal, or a less radical fully silicided (FUSI) approach.
In a press release issued by Intel over the weekend, Intel co-founder Gordon Moore is quoted as saying, “The implementation of high-k and metal materials marks the biggest change in transistor technology since the introduction of polysilicon gate MOS transistors in the late 1960s.”
Mark Bohr, Intel senior fellow, added, “As more and more transistors are packed onto a single piece of silicon, the industry continues to research current leakage reduction solutions. Our implementation of novel high-k and metal gate transistors for our 45 nm process technology will help Intel deliver even faster, more energy-efficient multi-core products that build upon our successful Intel Core 2 and Xeon family of processors, and extend Moore's Law well into the next decade.”
In a similar press release, IBM said it inserted high-k/metal gate technology into its state-of-the-art semiconductor manufacturing line in East Fishkill, N.Y., and will apply it to products with chip circuits as small as 45 nm starting in 2008.
“Until now, the chip industry was facing a major roadblock in terms of how far we could push current technology,” said T.C. Chen, vice president of science and technology at IBM Research. “After more than 10 years of effort, we now have a way forward. With chip technology so pervasive in our everyday lives, this work will benefit people in many ways.”
Bernie Meyerson, vice president and chief technologist of IBM’s Systems and Technology Group, said the technology had become a fundamental differentiator. “We’re already running high-k/metal gate chips in our fab in Fishkill, and they’ve been running for quite some time to go through all the qualifications. What’s happening is we’ve announced that we are actually formally doing a couple of things: One, we’ve sent out papers on this and expect a flurry of activity; the second thing is we’re actually going out with a form of high-k where we raise the bar a lot over where people have been.”
Meyerson said the real news is that the process has been perfected to the point where it is a “drop-in” replacement for SiO2. “The challenge has been, historically, these materials have been, to say the least, delicate. As a consequence of that, people have not been able to do them as drop-ins… they’ve had to do all sorts of exotic processing and go back and reinvent the whole flow of the transistor process. The version that we’re going to go out with, not only is it a drop-in — literally a one-to-one swap-out with the SiO2 — but it’s also a significant advance in terms of being able to drive the actual Tox (equivalent oxide thickness) down dramatically.” IBM is not releasing specifics at this time, but plans to do so in a paper to be presented at the Symposia on VLSI Technology and Circuits in Kyoto, Japan, in June.
