Data Is King

Content is king. At least that's what we hacks in the publishing industry like to say. In the face of all the new media out there — webcasts, podcasts, blogs and more — it's good to remind ourselves of that from time to time. Meanwhile, the same can be said in the lithography world. Content is king. Or, perhaps, data is king.

There's an awful lot of good and worthwhile work going on in the physical creation of circuit patterns —in immersion lithography, extreme ultraviolet (EUV) lithography and nanoimprint lithography, to name a few. But let's face it: The data that's coursing through the mask shops is what's really keeping Moore's Law alive. We can talk about what lithography technique will take us into the next generation, and then the next, but for all the discussion of the end of optical lithography, the burgeoning of such technologies as X-ray, ion-beam and various e-beam lithography strategies, and then the shift to immersion lithography, EUV and a slew of innovations, and so on, and so on… It's the resolution enhancement techniques (RETs) and their optimization through faster and more powerful software and data-crunching tools, dealing with increasingly complex mask designs, that continue to make possible the next improvement in feature resolution.

For much of the industry, water-based immersion lithography at 193 nm (193i) is considered the technique to be used on critical layers at the 45 nm half-pitch. And EUV, for whatever reason, is still considered the technology to beat at 32 nm. Although some may consider other innovative solutions to the Moore's Law challenges, still others — like Intel or TSMC , for example — have said they will stick with dry for a bit longer. Granted, in a company like Intel, where they make their own masks and run large volumes of wafers on a single mask set, they can get away with the incredibly complex masks that would just be too costly for others to amortize. Nonetheless, the fact remains that it continues to be possible to rely on design software to eke ever more functionality out of resolution-enhancing schemes.

At last September's Photomask Technology conference, it was evident that the software vendors — Cadence, Synopsys, Mentor Graphics and the like — were taking over the world. Sessions abounded on design for manufacturing (DFM), optical proximity correction (OPC), data management and more. And lately, Brion Technologies, which focuses on computational lithography for lithography-driven design and manufacturing, just can't seem to stay out of the news. ASML, which already had EDA-player MaskTools as one of the legs of its self-described three-legged stool, added a fourth leg in December with the announcement of its planned acquisition of Brion. The lithography toolmaker has shown that it knows which way the wind is blowing, and the real power these days comes from the data.

With the latest update to the International Technology Roadmap for Semiconductors (ITRS), it's now even more apparent that data is king. A significant addition to the Lithography chapter in the 2006 update is that of double patterning as a potential solution beginning with the 45 nm half-pitch (see “Double Patterning Makes a Big Debut in Roadmap,”). Here is where mask design really takes the wheel — the idea being that a pattern is split into two mask designs, which are printed one on top of the other to create the final fine-resolution wafer pattern. As the ITRS states in the Difficult Challenges section, the success of this technique will rely on the availability of software to split the pattern, apply OPC, and verify the quality of the split while preserving critical features and maintaining no more than two exposures for arbitrary designs. For more on double patterning, see this month's cover story, “Double Patterning Wrings More From Immersion Lithography .”

Speaking of the ITRS, I find it particularly telling that, regardless of what changes continue to be made to the Lithography chapter's Potential Solutions section — adding and subtracting technologies, and extending out the introduction date of various alternatives, for example — the disclaimer below the chart remains the same: “RET and lithography-friendly design rules will be used with all optical lithography solutions, including with immersion; therefore, they are not explicitly noted.” That about says it all.

Meanwhile, the semiconductor industry will continue to pursue technologies like EUV lithography to get chips to the “next” generation, and we at Semiconductor International will continue to pursue new forms of media to reach our readers in new ways. But at the end of the day, content — and data — will still be king.