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U.S. Metrology at a Crossroad

Alexander E. Braun, Senior Editor -- Semiconductor International, 1/1/2007

Herbert S. Bennett, a NIST fellow and executive advisor at the National Institute of Standards and Technology (NIST, Gaithersburg, Md.), with inputs from many of his industrial colleagues, has provided an overview of the state of measurement technology in the semiconductor industry,1 derived from an analysis of the 2005 International Technology Roadmap for Semiconductors . For this perspective, which represents his own views and not necessarily NIST’s, Bennett included semiconductor memories, microprocessors, signal processors, RF and analog/mixed signal circuits, logic devices, and emerging devices and materials. Admittedly, although a “snapshot” of what the author describes as the U.S. measurement system (USMS), he observes the following trends in our industry:

  • A shift in competitiveness among semiconductor manufacturers from an emphasis on processing technologies to product design, architecture, algorithm generation, software, and lifecycle evolution.
  • Increased R&D costs and fabs are becoming formidable.
  • Shorter process technology lifecycles.
  • Faster process characterization through increased modeling and simulation for nanotechnologies to offset cost increases associated with measurements.

Not surprisingly, Bennett states that technological innovation and advanced processes require an even steeper development of measurement capabilities to verify CDs, lithography, front-end processing, interconnect performance, and low- and high-k, as well as for materials and contamination characterization. He sees these metrology challenges originating in various sectors from now to the year 2013:

  • DUV and immersion lithography.
  • CD control problems in litho and etch, as a result of aggressive gate scaling.
  • Insufficient nanometer structure design and simulation tool capacity block new technology introduction.
  • Signal isolation complexities, particularly between digital and analog chip regions, pose scaled technologies and increased integration complexity roadblocks.

Beyond 2013, Bennett points out that precision measurements for CDs down to 7 nm and linewidth roughness (LWR) metrology of 0.8 nm in 3σ with an overlay accuracy of 2.8 nm in 3σ will be nearly impossible without metrology tools with sufficient accuracy to enable CD and process control. It is clear that a much-improved fundamental understanding of chemistry, materials and condensed-matter physics down to atomic dimensions is needed, leading to a chicken-or-the-egg situation in that, to acquire the necessary understanding, innovative metrology tools will be necessary, and these metrology technologies will require the already described fundamental understanding.

Due to escalating R&D costs, the article observes that responsibilities are shifting from the OEM to equipment and materials suppliers, and says the industry should intensify its partnerships with academia, consortia and government to meet measurement roadblocks.

At the rate the semiconductor industry is developing, for R&D expenditures to keep abreast of metrology needs, more government assistance is required not only in the way of grants, but also in ensuring that regulations do not hamper the needed progress. (Source: VLSI Research)

While several of the measurement technologies that will be needed are in the R&D stage, Bennett points out that some of the brick walls they may run into are not all of a technological nature. “During the production, market, and end-use stages, regulations may have a critical role in technology development and deployment. Continually evaluating whether regulations will inhibit or enhance technological innovation and its successful deployment is particularly important for the health of USMS,” he said.

Although Bennett does not allude to it, it seems obvious that because engineers in the halls of the U.S. Congress are not abundant, semiconductor engineers and their professional organizations must communicate with their respective government officials to attempt to moderate their nanoelectronics illiteracy. Pointing out to lawmakers which regulations may inhibit, rather than stimulate, progress and innovation is vital; ensuring that the government provides adequate R&D funding is equally as crucial.2

According to Bennett’s findings, five independent studies have already concluded that the United States is in serious danger of losing its leadership in technology and innovation, with deleterious consequences to future economic prosperity and security.


References
  1. H. Bennett, “Will Future Measurement Needs of the Semiconductor Industry be Met?” NIST J. of Research, to be published.
  2. A. Braun, “Helping Metrology Measure Up ,” Semiconductor International, December 2006, Vol. 29, No. 13, p. 15.
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