Michael Fancher, University at Albany, State University of New York
Alexander E. Braun, Senior Editor -- Semiconductor International, 12/1/2006
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| Michael Fancher (Source: Albany, SUNY) |
SI: What is “nanoeconomics?”
Fancher: The enabling aspect of nanotechnology isn't only affecting the technology roadmaps for many businesses in the semiconductor industry, but is also requiring the development of new business practices and economic models. At the world's first nanotech college, we've established nanoeconomics as one of our four constellations: nanoscience, nanoengineering, nanobiotechnology and nanoeconomics.
SI: What is nanoeconomics' purpose?
Fancher: It's to examine the technological, economic and business drivers causing new economic forces, evolving business models, and dynamic risk-mitigation strategies that are emerging in nano-driven industries, such as semiconductors.
SI: How different are these nanoeconomic forces to those that have traditionally driven the semiconductor industry?
Fancher: When you think of the enabling aspects of nanotechnology, for example, having a variety of applications for the same nanophenomenon, and the rapid escalation in cost to commercialize nanotechnology, there's a growing need for alternative technology partnership models. Many of our partner companies — several of them OEMs — are looking to give their customers options, and are confronted with multiple design parameters; they have a need to gain access to a quick turnaround time capability to do their R&D and pilot prototyping, which isn't just prototyping the device, but also developing the process flow to fabricate it in a fast, cost-competitive fashion. New technology models that can minimize risk, protect IP, and maximize business opportunities are critical to success. Another aspect is the application of the knowledge we're acquiring as a result of working with more than 150 companies, a variety of consortia, vertical teams, and partnerships to different industries (biotech, energy and security, for example) as they begin integrating nanotechnology into their production processes. Those varied industries will, too, confront similar challenges requiring new technology partnership models and decision-making processes.
SI: That makes us pioneers.
Fancher: Certainly. The semiconductor industry is arguably the first industry to incorporate nanotechnology in a high-yield, low-cost, integrated process deployment.
SI: How do you see nanotech funding these days?
Fancher: There are primarily two factors driving investment in nanotech. The first pertains to the federal government's investment under the National Nanotechnology Initiative, in what can be characterized generally as a bottom-up technology push approach. While exciting discoveries have emerged from university and government labs that have sometimes spawned small nanotech companies, these discoveries are often left searching for market applications. What I find critical is the very low level of investment supporting the important development and pilot scale-up stages in commercialization. With the development of the top-down demand pull approach to nanotech as a result of the semiconductor industry's investment in the infrastructure crucial for high-yield, high-throughput nanofabrication, the single largest opportunity for realizing the promise of nanotech in a broad array of applications beyond semiconductors is within reach.
SI: How do you view our industry's approach to nanotech?
Fancher: I see it as a very conscious, evolutionary approach, which is very aware of what the real market for nanoelectronics is. For instance, it seems to be generally agreed that CMOS will hit fundamental limits in about 15 years. This prompted the industry to create the Nanoelectronics Research Initiative, a consortium of the SIA member companies, which resulted in the Nanoelectronics Research Corp. to develop and administer university-based programs. One major component of that, which we head up here at the college, is the one called INDEX — a $454M program headquartered here. It stands for Institute for Nanoelectronics Discovery and Exploration. INDEX is a joint effort between SIA and SRC to create the Bell Labs for the 21st century through partnerships between the nation's premier universities, as well as the world's leading semiconductor research, development and manufacturing companies.
SI: Bell Labs focused on very long-term research.
Fancher: True, but at the same time, it was a publicly traded company that had to generate products for the marketplace in a short-term fashion. It had a model that allowed them to do both, concurrently, under the same roof. In the case of INDEX, as well as the other centers and their logical extension, consider what New York state has done. New York sees INDEX as playing an integral role in the state's strategy to establish an R&D and manufacturing ecosystem for nanotech well into the 21st century.
SI: Nanotech must be developed and integrated onto a platform.
Fancher: Of course, and that platform is the 300 mm wafer. This is because OEMs cannot afford to develop their next-generation nanofabrication technologies on legacy tools. They must go to the next format dictated by the requirements of the memory and logic industry. So if the promise of nanotechnology is to be developed for a host of new applications, it must be done on an industry-compliant platform that'll allow the other elements — opto, bio, RF and energy — to be integrated onto it. We're contributing to this through a facility with a current net asset base of $3B, 450,000 ft² of state-of-the-art facilities, 60,000 ft² of 300 mm wafer cleanroom, which is also home to over 1300 scientists, faculty, researchers, engineers, technicians and students, many of whom work with the leading computer-chip companies such as IBM, AMD, Sony, Toshiba and Sematech, as well as OEMs like Applied Materials, Tokyo Electron, ASML, Ebara, Vistec and others.
SI: Considering the companies and organizations that contribute to the Albany nanotech effort, is there anything that you'd like to see them do differently?
Fancher: The participating companies understand that the challenges to converge the technology require a new collaboration model capable of integrating each of their respective IP elements into a manufacturable solution. A tool supplier looks to support his existing customers and market opportunities, such as logic and memory. In the case of Applied Materials, for instance, they're expanding into the emerging photovoltaic market area using their technology and knowledge base. In other areas, the MEMS sector is getting close to break out, but if you were to look at the market for a tool supplier who is focused on the MEMS arena, it wouldn't be a very large one, compared with memory and logic. It's very difficult for these companies to justify large expenditures to enter these presently developing, limited, fragmented markets. I think that a large majority of the companies involved in our projects are doing the right things at the right time.
SI: But those markets are gaining momentum.
Fancher: Indeed. And they will accelerate their development once we begin introducing the game-changing performance improvements that nanoprocessing technology delivers. In the case of MEMS, the problem is that manufacturers cannot afford to spend money on a 300 mm wafer process technology when they are still making MEMS on 4-, 6- or perhaps 8-in. wafers. They certainly won't require an entire 300 mm tool line to produce their MEMS; they may only need a few 300 mm technology tools. However, if they can explore how to insert emerging 300 mm nanoprocess technologies, such as ALD, for example, into their respective process flow, they can deploy a game-changing solution that's supported by the mainstream industry supply chain.
SI: So what can we expect from nanotech over the next three to five years?
Fancher: Considering the 300 mm silicon manufacturing infrastructure, I see it enabling the convergence of nanotechnology with electronics, photonics and bioelectronics, with microsystems and wireless technologies. But what's the common denominator? I think the development of 3-D wafer-scale packaging on 300 mm wafers is emerging as a key platform to accomplish this. This convergence will accelerate growth in a broad array of industries by enabling the development of tether-free computing. Once we realize this, we're no longer limited to selling chips only for computers; now, you are selling them for health care — for wearable health monitoring, for example. Huge markets are going to develop very quickly, so if you're an OEM, the prospect is for a lot of tools, and if you're a device maker, for a large number of chips of various functions.
