FUSI and HfSiON MOSFETs Move Closer to Production

Though the implementation of true high-k/metal gates in production still appears to be several years away, the interim solution involving hafnium-based oxides and fully silicided (FUSI) polysilicon, typically nickel silicide (NiSi), is advancing steadily, as evidenced by several papers scheduled to be presented at this month's International Electron Devices Society Meeting (IEDM). While previous successes have focused on the use of different phases of nickel silicide to achieve appropriate workfunctions and threshold voltages (V_t) for the PMOS and NMOS transistors,¹ a new report from NEC shows that single-phase NiSi on silicon on insulator (SOI) can achieve suitable V_t control for both low-standby-power and low-operating-power devices without incorporating phase control. Another important aspect of high-k integration is improved reliability and the maintenance of low leakage current. A study by Toshiba, NEC and Sony shows that an MOCVD HfSiON with a very low concentration of hafnium on the very top leads to improved time-dependent dielectric breakdown (TDDB) lifetime while maintaining low leakage currents.

Finally, recent studies have shown that fluorine has a positive influence on the reliability of metal gate/HfSiON-based FETs.² Fluorine atom incorporation is effective in reducing low-frequency (1/f) noise in SiO₂ devices because it reduces the interface trap density. However, fluorine's effect on 1/f noise in HfSiON films for analog and RF circuits has been undetermined. At IEDM, researchers from University of California at Berkeley and NEC are expected to show that, although fluorine can improve HfSiON PFET 1/f noise in a similar fashion to that of SiON devices, HfSiON nFETs do not benefit from fluorine incorporation.

Koichi Terashima and colleagues at NEC's System Devices Research Labs (Kanagawa, Japan) are scheduled to present a method for wide V_t control (V_t=0.2-0.6 V) of Ni-FUSI/HfSiON FETs. The use of SOI substrates reduces the V_t by 0.1-0.15 V, but for FUSI devices, the best method for V_t control has yet to be determined. Previous work has involved the use of NiSi (with or without nitrogen ion implantation) or NiSi₂ for the nFET device and Ni₃Si or Ni₂Si (with fluorine ion implantation) for the pFET device (Table). The NEC researchers concluded that Ni₂Si and Ni₃Si are not suitable for the nFET devices because of electron mobility degradation caused by the remote Coulomb scattering due to fixed charge. The fixed charge is generated in the HfSiON during the formation of the nickel-rich silicide. In pFETs, they determined that nickel-rich silicides could be used for V_t control because of the negligible hole mobility reduction, even with the fixed-charge reduction. However, it was found that the fluorine implantation technique for pFETs with NiSi is better for V_t reduction than nickel-rich silicide in terms of mobility and reliability improvements.

The Toshiba/NEC/Sony study, led by Motoyuki Sato of Toshiba (Yokohama, Japan), showed that, by adding a thin cap layer to HfSiON, device reliability could be significantly improved. The MOCVD process for HfSiON typically uses metalorganic sources such as tetradimethylaminosilane (TDMAS). However, new silicon source materials allow wider control of hafnium concentration (6-100%) and an order of magnitude reduction in carbon contamination. Dielectric constant of the low hafnium concentration (Hf/(Hf+Si)=6%) cap was 8 and that of the HfSiON layer was 12. The cap led to reduced V_t shift caused by a reduction in carrier traps. The reliability improvement was attributed to a reduction in electric field in the HfSiON.

In the Berkeley/NEC study, they reported on the effect of fluorine on 1/f noise with HfSiON. By examining the noise, tunneling leakage and NBTI data, they were able to examine the beneficial effects of fluorine incorporation in SiON and HfSiON devices based on a 65 nm technology. They observed a gate length dependence of noise with and without fluorine. As gate length becomes shorter, the beneficial effects of fluorine on pFET noise becomes weaker. In short-gate-length devices, fluorine may out-diffuse into the offset spacer during thermal processing.

From the data, a model of fluorine influence on traps was proposed. In SiON devices, fluorine improves the noise in both nFETs and pFETs because fluorine incorporation passivates traps close to the conduction band and valence band. In other words, the noise data reflects the density of traps at the silicon surface close to the Fermi level.

For HfSiON devices, two kinds of traps are expected: one related to the SiON/Si bond defects (interface traps), which also exist in SiON devices and can be terminated by fluorine (therefore the beneficial effect on pFETs). The second traps related to the hafnium are mostly located near the conduction band, which is why they mostly contribute to noise in nFETs. The density of these traps is unfortunately increased by the presence of fluorine (Hf-F complexes).

New technology development to reduce 1/f noise of high-k pFETs will be necessary since the noise is insensitive to high-k thickness reduction. However, the researchers point out that using a larger width for the pFET may be a possible solution.