2006 Top Fab Award: Texas Instruments and Chartered Semiconductor Manufacturing

When Semiconductor International created the Top Fab Awards in 1991, our staff wanted to highlight those fabs that were making a difference in the semiconductor industry. Now, 15 years later, the tradition lives on (Table). Two fabs were chosen as the recepients of the 2006 Top Fab Award: DMOS6, a Texas Instruments fab located in Dallas, and Singapore's Chartered Semiconductor Manufacturing Fab 7.

DMOS6

Dallas Metal Oxide Semiconductor Fab No. 6, or DMOS6, is a 190,000 ft² facility built in 1996 and cleanroom certified in 2000. The products manufactured in this facility include a wide range of high-performance, low-power DSP products and application-specific processors. Initial production starts were 2500 wafers per month at the time of qualification, and the fab was producing 14,000 wafers per month by April 2005; total planned capacity for DMOS6 is 25,000 wafers per month.

“When we brought DMOS6 online, we challenged the team with qualifying C035 using copper, which at the time was the industry's latest process technology,” said Kevin Ritchie, senior vice president of the technology and manufacturing group. “This was done at the same time as TI was transitioning some of our newer technologies from 200 mm to 300 mm production. The team's dedicated focus, collective knowledge, and structured methodology allowed us to successfully qualify the technology on 300 mm. This was a tremendous benefit to our customers and a successful launch of TI's first 300 mm fab.”

The fab also produces high volumes of wafers on multiple advanced CMOS technologies, including 130, 90 and 65 nm semiconductor solutions, with established benchmark process yield for those same technology nodes. Photomask generation dictates how quickly new products can be introduced. TI's track record of technology node migration is about two years between the qualification of major technology nodes. 130 nm was qualified in 3Q02, 90 nm in 4Q04, and 65 nm in 2Q06, with 45 nm currently being developed.

DMOS6, a state-of-the-art fab, located in Dallas. (Source: Texas Instruments)

DMOS6 was one of the first 300 mm facilities to enter customer-qualified production on a 130 nm copper process, as well as the first fab to reach 10,000 copper 130 nm wafer starts per month. The fab was able to transition to 130 nm copper and 300 mm wafers simultaneously in July 2002. The first devices were wireless DSPs for mobile handsets.

To drive yield ramp activities, DMOS6 uses cross-functional process loop teams. These teams are made up of members from process engineering, equipment engineering, and process integration engineering. The fab also applies a sameness statistic within TI factories that shows a comparison of each factory that is running a technology. This sameness is used in determining process changes to ensure that there are no unexpected occurrences.

Contamination control/environmental impact

Contamination is controlled in the DMOS6 fab in multiple ways. The cleanroom is Class 100 with mini-environment tools that are internally Class 1; dressing for Class 1 is also required. FOUPs are used for transporting wafers from one manufacturing tool to the next. These are coded by color, corresponding to each machine that has also been labeled by color. Pegs that appear on the bottom of the FOUPs make it so that a particular color will only fit on a specific tool contamination level. Before processing begins, automation checks the FOUP RF ID tag to ensure that the lot is in the correct tool.

Technicians monitor an implant process in the DMOS6 cleanroom. (Source: Texas Instruments)

Cleanroom areas are continuously monitored to ensure positive pressure is maintained from clean to dirtier areas; air flow and mechanical equipment are also continuously monitored. Automatic paging is set up to alert supporting staff in case harmful changes to the fab environment occur. Airborne molecular contamination readings are taken annually or when a potential chemical release has occurred. Emergency procedures and personnel are annually reviewed as well.

“TI's goals are simple. We want to have zero wasted resources, zero illnesses and zero injuries in all of our operations,” said Brenda Harrison, TI vice president, worldwide environmental, safety and health services. “DMOS6 is a major contributor towards TI reaching these goals with their strong commitment to environmental, safety and health stewardship. This is a TI tradition, and is paying off in increased productivity, a reduction in lost man hours and optimization of our resources.”

More than 80% of all the materials used in DMOS6 are specifically segregated for recycle or beneficial reuse. The resource optimization team and sub-teams use ESH management techniques to identify significant aspects, set objectives and targets for continuous improvement, and review progress toward goals. Exhaust and water consumption projects have resulted in huge reductions in the use of these resources, from optimizing facilities systems to working with tool suppliers on tool design modifications.

DMOS6's attention to ESH guidelines has earned it seven internal safety awards. In addition, the fab accomplished three consecutive years without a lost-time accident in April of this year.

Chartered Semiconductor Manufacturing

Working under a team motto of “Together We Win!!!” Chartered Semiconductor Manufacturing has done just that. Fab 7 is a state-of-the-art facility that manufactures 300 mm wafers using 0.13 and 0.11 µm, and 90 and 65 nm processes. The fab was designed to scale to 45 nm technology and beyond. Inside, its systems are comprised of an automated materials handling system and computer-integrated manufacturing that transports wafers seamlessly from process to process, equipment to equipment. The fab is also supported by advanced process control (APC), fault detection and classification, as well as recipe management.

In early 1995, Fab 7 ramped 90 nm production. (Source: Chartered Semiconductor Manufacturing)

Chartered is part of the Common Platform initiative, with IBM, Samsung and Infineon making up the rest of the group. The goal of the Common Platform model is to bring unprecedented freedom of choice and cross-foundry cooperation to customers everywhere. With this platform, Chartered has been able to improve its rate of technology evolution while changing the landscape of the foundry industry. “The fact that Fab 7 is part of the Common Platform is almost a bonus for customers,” said Kay Chai Ang, senior vice president of fab operations. “They get access to all this great technology and manufacturing expertise, and that capacity is available in an almost identical way from our partners' fabs. This offers a whole new level of flexibility and choice for our customers, and has helped us accelerate our development time, thanks to the close level of cooperation with the other Common Platform participants.”

Fab 7 worked on ramping 0.13 µm and 90 nm processes simultaneously, completing these tasks in August and December of 2004, respectively. Within three months, Fab 7 went from prototyping four new 90 nm products to their full-scale production. “We expect the ramp to 65 nm to be at least as fast, if not faster in the coming year. And we are already planning for 45 nm readiness by the third quarter of 2007,” Ang added.

Fab 7 received the Gold and Excellent Awards from Singapore’s Ministry of Manpower for excelling in ESH performance. (Source: Chartered Semiconductor Manufacturing)

In addition, to reduce random and systematic defects, Fab 7 uses integrated inline defect detection systems for yield baseline improvement and excursion control. This is performed through elaborate feedback and feed-forward systems leveraging the bright and darkfield inspection tools with inline automatic defect classification; e-beam, bare wafer inspection and high-resolution optical review stations; inline SEM review stations with EDX and tilt SEM; and yield and defect data management systems with decision flow analysis.

The fab uses 193 nm immersion photolithography tools for resolution enhancement, combined with optical proximity correction (OPC) and phase-shift masks (PSMs) for annular illumination. Rule-based OPC is applied to reduce process bias difference, followed by model-based OPC to achieve the proximity effect of the tight CD budget required for low-k1 imaging. Optical rule check on the graphic data system, tight reticle CD control, and process window verification are all used to correct OPC compensation and identify weak points in the prime die that could potentially become yield “killers” during the process ramp.

Contamination control/environmental impact

Fab 7 has incorporated many elements to reduce its impact to the environment and surrounding community. The fab was constructed with segregated waste stream collection lines that allow it to separately collect waste solvents and acids. Operational benefits include lowering the frequency for multi-filter backwashing, pre-reverse osmosis filter replacement, and better reverse osmosis performance in water recovery. Best practices include high-energy-efficiency brushless DC motor fan filter units, building automation and control for heating, ventilation and air conditioning through a facility management system, and use of minimum glazing areas for the cleanroom building façade to reduce solar loads. The fab has also been a recipient of the Gold and Excellent Awards given by the Singapore Ministry of Manpower for excelling in EHS performance.