Advanced Metrology Tackles New Materials, Process Complexity

Engineers must now consider metrology as a function of application. We no longer live in the happy world of the optical microscope or even the CD-SEM, where one tool fits almost all needs. For development and ramp, different sampling and measurement methods from those used for high volume may be needed. Beyond 45 nm, metrology will get increasingly complicated for those doing ramp work and gearing for volume production. They will increasingly require additional and more complex data — quickly.

The lithography question

Parametric measurements face hurdles, but control challenges for lithography tools may be even greater. “At 180 nm, we began venturing into the subwavelength regime,” said Kevin Monahan, vice president of technology in the Parametric Solutions Group at KLA-Tencor (San Jose). “OPC was simple at 180 nm. At 130 nm, everything got complicated, with multiple design rules in the same field, subresolution assist features, and second-order serif patterns. At 90 and 65 nm, there are more printing difficulties because of the increased difference between the wavelength and the CD.” (Fig. 1 )

The move from 130 to 90 nm and then to 65 nm was assisted by conjoint design for manufacturing (DFM) and advanced process control (APC) strategies, where DFM made the pattern more simple and printable. Combined with multivariate APC, control tightened within more relaxed yield windows. The 45 nm node will get a “resolution assist” by immersion lithography. At the 32 and 22 nm nodes, there will probably be some double patterning, unless extreme ultraviolet (EUV) accelerates beyond expectations. Double-patterning lithography requires double exposure and etch — first a photo step and a hard mask etch, then a second photo step and hard mask etch. This produces a scheme whereby there is overlay on each step, creating an alignment problem similar to the one found from layer to layer, except that it is on the same layer.

1. Lithography technology has evolved from optical to at-wavelength and deep subwavelength. Reticle complexity and other factors have increased the need for inspection to cope with the ~30%/node process window collapse. Immersion lithography is being looked at, but it has its own yield issues. (Source: KLA-Tencor)

“Imagine patterning two features with an overlay error between the two and the CD in between,” said Monahan. “The overlay error feeds linearly into the CD error; this makes overlay control as important as CD control. Formerly, overlay control had a 30% of design rule requirement. With double patterning, this'll shrink to 10% of design rule requirement or tighter. Presently, no lithography tool can do that.”

The best dry lithography tool provides a single machine overlay capability of ~4 nm. Currently, available immersion tools have overlay specifications of 8 nm. To get to the level required for double patterning at 32 nm, a 3 nm (2 nm for production) minimum will be needed and today's single machine overlay must improve by a factor of four.

There are road-mapped machines — such as a 1.35 numerical aperture (NA) tool — that may reach 6 nm, but this is still inferior to a dry tool. Most immersion lithography overlay problems are thermally related, and these effects can worsen as the wafer runs faster, limiting throughput. In addition, evaporative cooling can add to thermal non-uniformity.

Years ago, there were just three overlay issues to cope with: tool noise, mark noise, and unmodeled error. Even with traditional box-in-box overlay targets, tool noise could be reduced. The move to standard grating targets in overlay metrology arose from a need for process robustness. These targets resemble dummy structures used to reduce dishing and erosion during chemical mechanical planarization (CMP), and are highly resistant to distortion. Moreover, they present more features in the overlay tool's image field, providing a better signal-to-noise ratio and improved basic performance.

To handle unmodeled error, smaller grating structures called micro-AIM targets are used. These micro-gratings can often go in more places in the field, sometimes in the die itself, and may better represent the actual overlay, reducing unmodeled error. While it is possible to put AIM grating targets in the lithographic field's four corners, it sometimes helps to show what happens closer to the center.

Another overlay issue arises from the fact that lithography platforms now have dual stages. While performing dry metrology on one stage and wet exposure on another, swapping seems like a good throughput idea although the overlay (grid) error of stage one is seldom the equivalent of stage two. To attain the overlay control required for immersion lithography, it may be necessary to dedicate not only the lithography cell but also the stages. This could amount to a 2% productivity hit, because when the FOUP reaches the scanner, there is a 50% chance of having the correct dedicated stage presented. If a swap is necessary, throughput drops. All of this may become necessary because of overlay's criticality, particularly in the case of double patterning.

Since up to 80% of CD variation originates from lithography cell changes in the effective dose and focus, there is increased interest in 3-D scatterometry for focus dose monitoring and feedback. By segmenting grating targets used for scatterometry into bars, it is possible to measure the end wall angle, length and width of the bar. When calibrated using focus-exposure matrices, these targets can provide a simultaneous on-product focus, dose and CD monitoring capability that is suitable for APC.

Diminishing tolerances

Nanometrics (Milpitas, Calif.) currently focuses on film thickness, overlay and scatterometry as it particularly applies to masks, reticles and wafers for CD and film thickness metrology, which is also extracted from scatterometry information, in addition to CD and profile information. According to Peter Gise, Nanometrics' marketing director, “With overlay, dual patterning becomes a metrology driver at 45 nm and beyond. While before you had a process tolerance of maybe one-third, now, with double patterning, it's about one-fifth. This makes the process tolerance only 9 nm. Since the metrology budget is 10% of that, the tolerance on overlay metrology is only 0.9 nm.”

Dual patterning at 45 nm and beyond will drive image-based overlay metrology. It is uncertain whether scatterometry will be the panacea, because right now it has only proven itself to be equal in precision in the CD and overlay arena.

Moving beyond processing monitoring, an even greater industry need is the means to loop back metrology data to adjust and influence subsequent circuit designs. The data management issues are significant, but the advent of true “predictive metrics” is a challenge that must be met to achieve customers' time-to-market goals for future generations of devices, Gise noted.

Ram Peltinov, global product manager for CD-SEM products at Applied Materials (Rehovot, Israel), sees metrology challenges becoming complicated. “CD-SEM was always a production-process monitoring tool and used also for development. The lithography challenges through immersion, double patterning, double exposure, and aggressive OPC design, together with the requirements to shorten cycle times, make the CD-SEM also extremely critical for the R&D phase, driving new requirements,” he said. “We see an increased need to measure large amount of small and non-well-defined 2-D structures that are located only after smart hot spot assessment.”

In production, measurement points increase as nodes shrink. There are more targets in more critical locations, as well as targets spread over a larger area. CD-SEM technology is expected to cope with these requirements. The main challenge in production now and into the future is process monitoring of 2× nm structures with high relative accuracy and precision, both within a fleet of matched tools.

Integrated metrology inches on

Although integrated metrology (IM) has worked with CMP since 1996, it has progressed slowly in other process areas. “In more 'stable' processes, such as CVD, integrated metrology has been partially adopted mainly for excursion monitoring, and sometimes for CMP feed-forward control. I don't see that changing,” said Giora Dishon, a founder of Nova Measuring Instruments (Rehovot, Israel).

In measurement-intensive areas, primarily lithography, IM is perceived as an obvious option, particularly for overlay, CD and macro inspection. This has not yet happened, although IM has a presence in macro inspection, primarily for excursion monitoring. Optical CD and overlay are not yet integrated in production, and it remains to be seen what happens beyond 65 nm. Dishon expects that in the near future IM in lithography will grow significantly, because it is the only way to provide fast feedback for tighter process windows required by future technology nodes.

As 65 nm goes into production, Dishon does not foresee problems for metrology. “Thinner films and smaller geometry needs can be met inexpensively. At 65 nm, optical CD will be adopted in production, particularly with the spread of copper and low-k materials, which impose uniformity, composition and line geometry challenges.”

Metrology is meeting these new materials and processes requirements by extending existing technologies and migrating capabilities from lab to fab. In the non-metal thin-film area, critical shape metrology — scatterometry-based — is not only replacing CD-SEM for measurements but is gradually being adopted in process steps where previously only thickness was measured. For non-transparent thin films (metals, composites) and very thin (<15 Å) films, different X-ray technologies such as X-ray fluorescence (XRF), X-ray reflectivity (XRR), X-ray diffraction (XRD), and X-ray photoelectron spectroscopy (XPS) are coming online.

Bob Monteverde, director of marketing at Timbre Technologies (Santa Clara, Calif.), is more optimistic about IM. “We've gone beyond just excursion monitoring,” he said, pointing that Timbre's Optical Digital Profilometry (ODP) scatterometry is used in production for both lithography and etch applications (Fig. 2 ).

2. ODP enables fast monitoring of every wafer for detection of out-of-spec wafers and systematic issues. ODP can detect an issue of every 5th wafer, which would not be noticed in other conventional metrology tests. (Source: Timbre Technologies)

The big challenge lies in lithography — linewidths shrinking faster than the wavelength of the light used to expose wafers, forcing workarounds such as phase shift masks, OPC, and different illumination schemes. Increasingly, the “magic” seems to be taking place on the mask. There are more knobs to twist and more parameters to control, meaning more things that can go wrong.

This calls for more measurements, measurements that are more accurate, more information from the measurements, and trends toward IM. As Monteverde puts it, “Why do you measure? To learn if something is going wrong and, if so, to fix it before it's too late. Additionally, in the patterning step, logic designers are trimming their gates, so at 90 nm one is working with 45 nm gates. At 45 nm, you'll work with 20 nm gates.” Thus, metrology requirements must be based on the 20, not the 45, nm node. Meanwhile, DRAM designers are making more 3-D structures. Device manufacturers are drilling holes in the silicon to make deep trench capacitors or doing recess gates. One must now think in three dimensions.

Another challenge for IM, as Youxian Wen, Timbre's applications director, sees it, is that with the capability of measuring every wafer on several points, floods of data result. “The question is what to do with it. It should provide useful information. This requires intelligent systems to effectively use it to tune or improve yield. With IM, you not only need to detect a problem quicker, but also to take action sooner,” Wen said.

Metrology and annealing

Michael Gostein, technology manager at Philips Advanced Metrology Systems (Natick, Mass.), views ultrashallow junctions as a focus area. “Beyond 65 nm, this becomes an issue. To make it work for the channel and conduction, ultrashallow junctions are required to make source/drain extensions.” To create these junctions, diffusion length must be limited to keep dopants from spreading too far. This means spike annealing, maybe flash lamp or laser annealing, to get a quick temperature rise and a short anneal.

In terms of dopant activation, spike and flash annealing techniques may lack sufficient across-wafer uniformity. If the anneal is insufficient or uneven, there are problems. Better metrology is needed to measure not just the implant process, but also the annealing of the implant process, carrier activation. For tomorrow's devices, the increasingly complicated anneal step may have to be monitored. IR metrology can measure that top layer of silicon's conductance or resistance, and show the number of activated carriers existing in the silicon.

Mike Whelan, president of Verity Instruments (Carrollton, Texas), believes that additional metrology is needed at the tool because of latency problems associated with the kiosk-type metrology tool and the increasing value at each process step.

By reducing complexity and accepting some practical technical trade-offs from more sophisticated first principle metrology tools, significant value added can be realized by integrating a simpler tool. The trade-off is that IM, which OEMs and fabs can likely afford or cost-justify to implement, sometimes lacks the precision that can be achieved with first principles techniques that might be used in a sophisticated scatterometry-based ellipsometer or some other small-spot optics technology.

Certainly, for in situ applications and potentially for inline IM, this might mean sacrificing pattern recognition and micropositioning, which add cost and complexity to the product and can potentially reduce IM product reliability. In all cases, the objective is to deliver real-time process control indicators that can then be used in coordination with the more expensive kiosk-type tools. The process trend information tells the tool what the ultimate calibration of the metrology value or vector might mean. This strategy can result in improved APC on the tool.

Beyond 45 nm

Metrology will get difficult beyond 45 nm. Jana Clerico, Pulse Metrology product manager at Rudolph Technologies (Flanders, N.J.), confirms this, “At 45 and particularly at 32 nm, everything changes, but fabs expect to use tools being bought now for three process generations.”

The key challenge for metrology providers is that no single process solution is likely to be adopted simultaneously by everyone. For example, the question of what barrier materials to use for 45 nm copper metallization is still open. Physical vapor deposition (PVD) tantalum/tantalum nitride is proven and may be extendable to 45 nm, but its resistivity is high and engineers are looking for other options. Other bilayers, such as ruthenium with tantalum nitride underneath, are being studied; a third option is ultrathin atomic layer deposition (ALD) films.

Rudolph is investigating solutions. Its Pulse technology is robust for relatively thick PVD films, but may not be extendable to ALD. For those, they are looking at X-ray fluorescence, which is widely used for composition measurements but has rarely been applied to very thin films. A monochromatic X-ray source helps to eliminate background signal, enabling the measurement of films as thin as 5 Å, with >1% repeatability. Another option is ellipsometry. This may seem counter-intuitive, because ellipsometers measure transparent films, and the focus is on metallic barriers; however, below ~200 Å, all films become transparent.

Necessary destruction

Stacey Stone, lead technologist for the Semiconductor Fab Group at FEI (Hillsboro, Ore.), sees device design's changing nature among metrology's problems — 3-D structures, for example. “On the front end are developments such as trigate and finFET structures. Engineers are struggling to determine how to do process control on this kind of structure, and what would be statistically significant measurement methodology, since top-down views no longer apply.”

Scatterometry and atomic force microscopy (AFM) are progressing, but have limitations. Engineers still rely on cross-sectional information for process characterization and development. There is a need for statistically significant cross-sectional data, whether a finFET structure or on interconnects. Interconnect profiles and over-etch levels on etch steps are becoming yield-critical. New processes can hardly handle a 5 nm step over a feature without some sort of tunneling or pipeline defect causing shorts and line breakages, or sharp corners causing electromigration issues.

Kevin Fahey, vice president and general manager of the FEI Fab Division, has an-other consideration. “We've all seen CD-based cross-sections used for failure analysis and root cause analysis. However, the introduction of so many new materials and structures is forcing process development engineers to do more statistically significant design of experiments using cross-sectional work.” At 45 nm, high sample volume will be required — statistically significant surveys using cross-sectional metrology. Already, 32 nm node materials are being investigated using advanced TEMs and SEMs (Fig. 3 ).

3. Schematic showing the shift to higher-resolution electron imaging techniques required to sup-port the industry’s advancing nodes. Typically, usage of a given technique begins in development or failure analysis support and moves to production use at a subsequent node. (Source: FEI Co.)

The future for advanced metrology does not lie solely with Swiss Army knife platforms or IM. It will probably center on multi-capability tools, but not necessarily all-use capabilities. Technologies will certainly be paired. Above all, flexibility, cost of ownership, and the trade-offs that these bring will be foremost in everyone's minds.