EUV Lithography Makes Important Advances
Aaron Hand, Managing Editor -- Semiconductor International, 10/1/2006
Extreme ultraviolet (EUV) lithography still has its work cut out for it if it’s going to be a cost-effective solution for mainstream semiconductor manufacturing, but it recently took a few more steps in the right direction. Two different research groups — IMEC (Leuven, Belgium) and the College of Nanoscale Science and Engineering (CNSE) at the University at Albany (N.Y.) — took shipment of EUV alpha demo tools (ADTs) from ASML (Veldhoven, Netherlands). And European EUV project More Moore announced the successful creation of a new means to inspect EUV mask blanks without destroying the sample.
IMEC took the first EUV tool shipment in August, running the system at full speed in its 300 mm cleanroom. IMEC, working with leading IC manufacturers and other program partners, has spent the past couple of years building a better understanding of photoresists for EUV lithography, and will now use the EUV ADT to further the research. IMEC’s EUV program includes investigation into:
- Optical path stability monitoring.
- EUV lithography reticle handling in a wafer fab.
- Assessment of line-edge roughness (LER) in EUV lithography and its relation to shot noise.
- EUV resist assessment and process optimization.
- Critical layer patterning at the 32 nm node and beyond.
- Printable defects of EUV masks.
Also in August, the University at Albany took delivery from ASML of what it says is a $65M tool. Once it’s integrated into CNSE’s Albany NanoTech complex, the EUV ADT will support the R&D programs of the International Venture for Nanolithography (INVENT), which is a $600M global industry-university consortium. ASML has a $400M R&D center at the New York State Center of Excellence in Nanoelectronics and Nanotechnology at the Albany NanoTech complex.
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| Installation of ASML’s
EUV advanced development tool in IMEC’s 300 mm cleanroom started Aug. 16.
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“This is a critical step in the development of EUV technology and readying it for eventual commercialization,” said James Ryan, professor of nanoscience and vice president of technology at CNSE, in a statement. “With the availability of EUV photomasks and the presence of a critical mass of nanoelectronics tool suppliers and computer chip manufacturers at CNSE’s Albany NanoTech site, when coupled with ASML’s earlier demonstration of operating wafer and reticle stages in a vacuum environment, integration of an alpha exposure tool at CNSE is a logical progress in preparing both the technology and the industry for adopting the EUV technology.”
This was a sentiment echoed by Martin van den Brink, executive vice president of marketing and technology at ASML, during his keynote address at last month’s Photomask Technology conference in Monterey, Calif. “The momentum today, with evaluation tools at IMEC and Albany, is a major step forward for EUV,” he said. The results at the two facilities are looking good, he said, noting the printing of 40 nm lines and spaces in a full field.
EUV lithography is slated for high-volume introduction at the 32 nm half-pitch, but many in the industry are doubtful that it can overcome technical challenges in time. Although van den Brink boasted of EUV’s ability to bring a 10-31% improvement in resolution compared with historic advantages of 19-47% for previous moves to shorter wavelengths, he admitted that it would not come without significant challenges. But he billed EUV lithography as “the only real opportunity to scale to 32 nm.”
More Moore, a research project funded by the European Commission to promote the development of EUV lithography, has taken important steps toward addressing one set of EUV challenges related to mask blank defects. Because inspectors can’t measure what they can’t see, the More Moore participants — including instrument manufacturer Focus GmbH (Hünstetten-Kesselbach, Germany) and two German universities, Bielefeld and Mainz — have developed a photoemission electron microscope that can measure features as small as 20 nm, and can do so without destroying the sample.
Of course, where this really comes in handy is inspecting EUV mask blanks, where before it was not possible to keep the mask blank intact during inspection. Also, the multilayer coatings used to give EUV mask blanks their necessary reflectivity have a way of hiding defects from scanning electron microscopes. And with decreasing circuit feature sizes comes the need to inspect for smaller defects. Already, the researchers have used the new microscope to identify 50 nm defects buried under the multilayer coatings of a mask blank.
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