X-Ray Technology Provides Materials Metrology at 45 nm

Over the past few years, we have experienced an unprecedented introduction of new materials and processes in CMOS device manufacturing. This has been a result of Moore’s Law’s implacable demand for device performance gains, combined with a growing effort on the part of the semiconductor industry to avoid the aggressive (and expensive) feature-size scaling that has historically characterized the evolution of its technology.

Thus, it has become progressively more difficult to scale CMOS transistors while maintaining high drive currents and reduced supply voltage, because threshold voltage and gate oxide thickness cannot be scaled at the same rate as V_dd without having the leakage current exceed standby power requirements. At the same time, higher-channel doping concentrations and more abrupt, shallower source/drain junctions have been used to control short-channel effects. These factors can result in detrimental effects to the transistor, such as degraded carrier mobility, higher dopant fluctuations, and increased series resistance.

At the Austin Silicon Technology Solutions Group at Freescale Semiconductor (Austin, Texas), Victor Vartanian, an integration engineer, and his colleagues have been investigating some of the extreme metrology challenges that are imposed by the introduction of new materials associated with strained silicon substrates, such as silicon germanium (SiGe) on insulator (SGOI), strained silicon on insulator (SSOI), SiGe, and silicon carbide (SiC), all of which are being pursued to enhance carrier mobility. Even though the application of strained silicon to conventional MOSFET devices is compatible with existing mainstream CMOS process technology, there are additional material characterization needs, wafer-quality monitoring demands, and more stringent requirements for film morphology and strain uniformity. Some of the drivers for material characterization for strained silicon CMOS devices include balancing uniform thickness, composition, and strain distribution to maintain uniform device performance; low defect density to ensure high minority carrier lifetimes and transductance; and low surface roughness to minimize the impact of interface scattering on carrier mobilities.

Correlation between XRR, XRF and SIMS for various SiGe films. Besides being non-destructive, XRR and XRF are insensitive to changes in optical properties. (Source: Freescale Semiconductor)

Traditionally, spectroscopic ellipsometry has been considered by process engineers as the method of choice for measuring film thickness. However, material parameters such as refractive index or absorption coefficients often depend on processing conditions, crystallinity or strain, all of which can differently influence this type of measurement. Approaches to measuring thin films that are insensitive to changes in refractive index thus become desirable, because they can then be used with greater confidence across wider process latitudes. Such non-destructive techniques investigated at Freescale are X-ray reflectivity (XRR) for thickness measurement, X-ray fluorescence (XRF) for composition, and X-ray diffraction (XRD) for morphology or strain measurements. Although X-ray metrology has not been a tool that has traditionally been used in semiconductor manufacturing, as measurement needs change it is now emerging as a powerful analytical technique for the required accurate measurement of challenging films. For example, XRR has found several useful applications in measuring a blanket-strained SiGe film on SOI. This is because reflectivity is not based on optical properties, and relaxing the film does not affect the accuracy of the measurement. Roughness and density measurements can also be obtained from XRR spectra, and whole-wafer film morphology maps can be produced, which are extremely useful for process optimization applications. Spectra can be used to generate a whole-wafer germanium fraction map, and XRD can be used to measure the strain in two SiGe films.

While strained silicon/SiGe CMOS technology has been successfully implemented at the 90 and 65 nm technology nodes, it has become quite obvious that as the rapid transition toward strained silicon proceeds, more extensive metrology than has been the case in past traditional transistor node changes will be required. It would appear that some of the metrology challenges that have been delineated by the International Technology Roadmap for Semiconductors (ITRS) have only begun to be addressed. An example is the measurement of composition and strain at the deep submicron device-length scale. As material, device and process challenges increase, additional new, nondestructive inline metrology techniques will have to come online.

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